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article influence of via stub length and antipad size on the insertion loss profile continues Figure 29: Fitted line plot for actual versus nominal stub length. all to "SE10," the maximum stub length. The measured stub length was plotted against the nominal stub length (Figure 29). Obviously, actual stub lengths and target stub lengths correlate tightly. This can be considered as proof that the backdrilling operation was well under control. Summary In this investigation, data were generated to predict the additional insertion loss generated by via stubs of the launch vias. The effect on the frequency of the resonant notch in the loss profile was also demonstrated. Both parameters were evaluated over various stub lengths and antipad sizes. The data confirmed that a larger via stub reduces the resonant frequency and increases the overall insertion loss. It was also demonstrated that a smaller antipad size has the same effect, but to a much smaller degree. PCBDESIGN References 1. Ippich, A. "A Designed Experiment for the Influence of Copper Foils and Oxide Replacements on Impedance, DC Line Resistance and Insertion Loss," IPC APEX Expo 2011. 2. Ippich, A. "A Designed Experiment for the Influence of Copper Foils on Impedance, DC Line Resistance and Insertion Loss," IPC APEX Expo 2012. 3. Bogatin, E. "Practical Analysis of Backplane Vias," DesignCon 2009. 4. Perez-Wilson, M. "The M/PCpS Methodology—Stage IV: Optimization," ISBN 1-88323705-X. 5. Perez-Wilson, M. "AnovA—Analysis of Variance," ISBN 1-883237-14-9. 6. Agilent User Manual "N5242A User's and Service Guide," N5242-90008. Alexander Ippich is a senior signal integrity engineer at Multek. Previously, he held various positions in Application Engineering and R&D. He worked also in the development of thin film TFT matrixes and LCD displays. His PCB manufacturing and engineering experience dates back to 1993. He received his degree in electrical engineering from University Stuttgart, Germany. January 2014 • The PCB Design Magazine 61