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22 The PCB Design Magazine • February 2014 Dk in the model must be increased to 3.83 to match the measured group delay—that increase can be explained by the layered structure and anisotropy of the dielectric due to that. How to explain the large difference in the predicted and measured insertion loss? Typically this situation is attributed to incorrect data from the manu- facturer. In this case, LT should be increased to 0.0138 to have an acceptable match for the insertion loss. With such adjustment, the mea- sured and computed GMS-parameters match well as shown in Figure 5. Another option is to assume that the dielec- tric loss tangent from the manufacturer data- sheet is actually accurate enough (it is typical- ly measured with the accurate strip resonator method and strips are made of smooth copper), and attribute all observed excessive losses to the conductor roughness. As shown in Figure 6, nearly perfect correspondence of measured and computed models can be achieved with the modified Hammerstadt model (Eq. 4) with the roughness parameter 0.32, roughness fac - tor 3.3 and conductor resistivity adjusted to 1.1 (relative to resistivity of annealed copper). To match the GMS group delay, smaller adjust- ment of the dielectric constant from 3.66 to 3.8 was needed. As the result of this simple example we end- ed up with two models—one with the conduc- tor roughness effect accounted by increase of di- electric loss tangent from 0.0117 to 0.0138, and another model with loss tangent 0.0117 as in the specs and additional modified Hammerstadt model for conductor roughness. Which one is correct? Both models are actually suitable for analysis of the 10.5 mil stripline on that board. However, if strips with substantially different widths are used, the model without roughness effect will be less accurate, assuming that all ad- ditional losses are due to conductor roughness. For instance if we use both models for analysis of 6-inch strip line with strip width 6 mil and 7.5 mil distance, two models will produce up PCB AND PACkAGING DESIGN UP To 50 GHz continues feature Figure 4: Measured (red and blue curves) and computed (green curves) generalized modal insertion loss (left plot) and group delay (right plot) for 6-inch stripline segments (dielectric model from manufacturer and smooth conductor model).