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50 The PCB Design Magazine • February 2014 loss in the channel end-to-end through the ex- ternal device to the host controller is -20 dB at the maximum signaling rate, according to the model by the USB organization. The channel model includes loss from the cable, loss from the connectors, loss in the device PCB, and at most a 7-dB loss across the host PCB, based on a 10-inch maximum trace length there. Active repeaters would be required if loss exceeds that -7 dB budget. Of course, the rescue to compensate for the signal degradation through the channel is equalization, both on the transmit and re- ceive sides. Microchip, one of the companies that manufac- tures chip sets to implement USB 3.0 (5-Gb/s maximum signaling rate), points out in their implementation guide- lines: Signal losses for copper trac- es running on FR-4 materials can be very significant at USB 3.0 SuperSpeed (SS) signaling rates. Ways to mitigate losses include: 1. Keep SS traces as short as practical. This is the single most practical and cost-effective thing that can be done to reduce signal loss. 2. Route SS traces on outer layers, rather than on inner layers. 3. Consider laminates with lower DF and DK ratings. These lower-loss materials include FR408HR, FR408HRIS, N4000-13SI, Rogers. 4. Try to route SS signals at a 45-degree angle to the material weave direction so that the trace does not occasionally line up with a high-resin, high-loss path. 5. Consider low-loss materials, like N4000- 13SI or Rogers. Note they twice emphasize switching from FR-4 to low-loss materials, and this is in an ap- plication note for devices to implement 5-Gb/s communication, not the upcoming chips to en- able double that rate. Jim Choate, the USB technology product manager at Agilent Technologies, recently pre- sented a webinar about compliance testing for USB 3.1 devices. He started his career working on computer motherboard design and valida- tion at Intel during the 1990s and later served as the USB Implementers' Forum (USB-IF) compliance committee chairman. He con- tends there is enough margin to push USB signal rates be- yond 10 Gb/s without aban- doning FR-4 for PC mother- boards, but concedes repeaters would be necessary and very likely much different archi- tectural approaches for USB chip sets. From his experience at Intel, he believes that using a material other than FR-4 for a PC motherboard would be a deal-breaker. Who would wager that each future generation of semiconductor devices, what- ever their function, won't be faster than their predecessors? Eventually, the expense of developing tricks to skirt the limitations of conventional PCB mate- rials won't be cost-effective, and the slight pre- mium for a material with far less loss will be well worth the price. I submit that we're close to that threshold. There's nothing intrinsically expensive about the constituents and manufacture of many high-performance materials, except for the special SiO2 glass in some products. Nat- urally, while the demand for such materials is low, their price will remain a little higher than that of materials in high demand. Would 30% lower loss at 10 GHz be worth it to you? PCBDESIGN design for manufacture WHAT'S DRIVING HIGH-SPEED PCB DESIGN? continues Amit Bahl directs sales and marketing at Sierra Circuits, a PCB manufacturer in Sunnyvale, CA. he can be reached by clicking here. Eventually, the expense of developing tricks to skirt the limitations of conventional PCB materials won't be cost- effective, and the slight premium for a material with far less loss will be well worth the price. I submit that we're close to that threshold. " "