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68 The PCB Magazine • June 2014 damage and contamination during backgrind- ing. The surface-laminated wafers are then load- ed into cassettes that will go into the cassette holder of the backgrinding machine. The ma- chine picks up the wafer from its back- side (untaped side) with a robotic arm, which positions the wafer for backgrinding. The process is automatically accomplished by a grinding wheel, following a precise set of parameters to ensure proper backgrinding. To remove debris from the wafer, it is usually washed con- tinuously with D/I water while undergoing backgrinding. Once the wafer has been back- ground, the wafer is returned to the cassette, and the cycle is repeated for the next wafer. Parameters set for back- grinding include spindle speed, spindle coolant water temperature and flow rate, D/I water temperature, initial and final wafer thickness, and feed speeds. Problem areas: • Die cracking/chipping: occurrence of fracture or chip- out anywhere in the die. Com- mon causes in the context of backgrinding: incorrect back- grind parameters resulting in excessive stresses on the wafer • Die scratching: induce- ment of any mechanical dam- age on the die, as when an opera- tor scratches a die with tweezers due to mishandling. Common causes: insufficient operator training, use of improper tools • Die metallization smearing: depression or deformation of any metal line on the die sur- face. Common causes: foreign materials on the backgrind tape, wafer mishandling • Die corrosion: corrosion of the metallic parts of the die as a result of prolonged expo- sure to water during backgrinding Most tapes rely on UV-curing to "de-tackify" the tape. Some tapes are not UV-cured and may rely on pressure-sensitive adhesives. UV curable tapes differ from non-UV tapes in that they must be exposed to a UV light source prior to removal. This makes it possible to achieve a higher tack during processing while ensuring ease of removal after exposure. Backgrinding and TSV Formation Through-silicon via (TSV) formation is the key enabling technology for 3D packaging of chips, notably of memory chips. While there are sev- eral processes for forming TSVs, the following process sequence seems to dominate: After CMOS processing has been completed on the de- vice wafer, vias are dry etched (e.g., by the Bosch process) from the active side of the wa- fer down to the inactive side of the wafer to form blind vias, which are then metal- lized. A "handle wafer," cov- ered with a bonding layer, is then brought in contact with the active side of the wafer. Then follows the backgrind- ing step that removes silicon all the way to the bottom of the blind vias to open them up and form through-silicon vias. After thinning, there are several processing steps on the backside of the wafer, involving challenging physical and chemical environments that the handle-wafer and its bond layer have to survive. These in- clude high-temperature and low pressure pro- cesses such as chemical vapor deposition, sput- tering, plating, and etching. In particular, it is the polymeric bonding layer that is vulnerable to chemical degradation and stress cracking. Thermoplastic resins appear to be more suitable After thinning, there are several processing steps on the backside of the wafer, involving challenging physical and chemical environ- ments that the handle- wafer and its bond layer have to survive. These include high- temperature and low pressure processes such as chemical vapor deposition, sputtering, plating, and etching. In particular, it is the polymeric bonding layer that is vulnerable to chemical degradation and stress cracking. " " SUPPoRTINg THIN STRUCTURES continues