Issue link: https://iconnect007.uberflip.com/i/344372
36 The PCB Design Magazine • July 2014 nity could cost hundreds of thousands of dol- lars. All of the above impact on company profit by increasing prototype costs and the time-to- market. Computer-based products have a very small market window these days (e.g., one year). If the product is delayed by six months (e.g., two re-spins) then the company has lost half its projected return. Figure 1 illustrates the traditional design process compared to the simultaneous parallel design process. Pre-layout simulation can be done during design capture to establish the re- quired design constraints. Functional sections of previously developed "golden" boards can be reused giving high confidence in performance and multiple designers can be employed on the same layout. Post-layout simulation and me- chanical integration can be done towards the end on the layout to ensure compliance to spec- ification prior to fabrication. This process can dramatically reduce development time. The significant business benefits of concur- rent engineering make it a compelling strategy. Introducing concurrent engineering results in: • Competitive advantage—reduction in time-to-market means that the business gains an edge over their competitors. • Enhanced productivity—earlier identification of design problems means potential issues can be corrected sooner, rather than at a later stage in the development process. • Reduced development time—development of high-performance products, in less time and at a reduced cost. Process improvement is a systematic ap- proach to ensure a development team optimizes its underlying processes to achieve more efficient results. Process improvement is an aspect of or- ganizational development in which a series of ac- tions are taken to identify, analyze and improve existing design processes to meet new goals and objectives, such as increasing profits and perfor- mance, reducing costs and accelerating sched- ules. These actions often follow a specific meth- odology or strategy to increase the likelihood of successful results. There are many ways to im- prove efficiency in the PCB design process: 1. Simulation: stackup planning, PDN analysis and signal integrity 2. Design reuse 3. Collaborative PCB design 4. Virtual prototyping: ECAD/MCAD collaboration 1. Simulation Pre-layout analysis allows a designer to iden- tify and eliminate signal integrity, crosstalk and EMI issues early in the design process. This is the most cost-effective way to design a board with fewer iterations, rather than starting with the "find-and-fix" based post-layout simulation. There are multiple facets to pre-layout anal- ysis including: • Stackup planning for controlled impedance, SI, crosstalk, and cost control. • Dielectric material selection for manufacturing yield, and high-frequency operation. • PDN optimization for product reliability and cost reduction. • I/O buffer and drive strength selection. • Topology optimization. • Termination strategy. • Floor planning for critical components. • Deriving layout routing constraints, including trace width, spacing and length matching. • Signal Integrity analysis to meet the design specifications, with respect to noise margins, timing, skew, crosstalk, and signal distortion. Although the trace impedance is specified on the fabrication drawing, stackup planning is often left until Gerbers are produced and the deliverables are sent to the fab shop. However, generally, the virtual dielectric material selec- tion and trace width and clearance provided do not match the desired controlled impedance. So, the CAM engineer returns the calculations that may require trace width and clearance changes. This is not what we need at the end of the design cycle. This flawed process can be attributed to the fact the PCB designers do not have access to field solvers during layout and either have to wait until an SI engineer analyses beyond design CONCURRENT DESIgN continues