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October 2014 • The PCB Magazine 41 THIN PCBS FOR SMARTPHONES continues trend in industries offered to them. It is obvious that for the producers of PCBs for smartphone devices it has been necessary to adopt for that demand and to reduce the thickness of their PCBs significantly. The period around the introduction of the first smartphones coincides with the break- through of the HDI technology in PCB mak- ing [2] . The first smartphones often featured eight-layer rigid boards, with a stack-up made of 1080 fabric style prepregs and 25 µm cop- per layers. While the layer count is similar for the boards of today's high-end phone, again the thickness changed significantly: from more than 1.2 mm in the year 2000 to approx. to ap- proximately 600 µm in 2011, while the target for a rigid eight-layer board in 2013 has been set to 400 µm. Experimental Set-up In order to evaluate the production process and performance of very thin rigid PCBs within this study test vehicles in three different tech- nological approaches have been built. The test vehicles then were subjected to a reliability test program comprising a MSL Level 3 reflow test, a thermo cycling test with lower temperature level of -40°C and an upper temperature level of +125°C at two cycles per hour and a highly accelerated stress test (HAST) at a temperature level of +130°C with a humidity level of 85%. Processing Technologies ALIVH™ and HDI/FV To build the rigid eight-layer board with a total thickness below 500 µm, two PCB produc- tion technologies were considered. First, HDI technology combined with microvia filling was chosen in order to realize the implementation of stacked via designs (HDI/FV) [3] . The second is the proprietary any-layer interstitial vias hole (ALIVH) technology that was introduced in 1996 by Panasonic/Matsushita, and which is well established in Japan. The HDI/FV process features the traditional process flow with lami- nation steps, mechanical and laser drilling and subsequently establishing the contacts between the layers by electroless copper deposition and electrochemical plating. Also the filling of vias is done in an electrochemical plating process, while the ALIVH process is based on printing a conductive copper paste into pre-drilled holes of the prepreg layers to achieve the required electrical connection from one copper layer to the other. A more detailed description of the process has been given by Happy Holden in the HDI Handbook [4] . A schematic view of the ALIVH process is shown in Figure 2. figure 2: schematic description of process flow at aliVh PCb production process.