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PCB-Oct2014

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50 The PCB Magazine • October 2014 The reliability behavior of the samples built during this study is overall considered as accept- able. Currently the material situation for the HDI process can be considered as advantageous compared to the materials situation for the ALIVH process. While this is specifically true for the reflow sensitivity behavior the observed dif- ference in performance of the three produced test vehicles was lower for the electrochemical migration in the HAST test. Finally the tempera- ture cycling of the parts did not cause any fail- ure during this study. It can be concluded that all observed tech- nologies are generally feasible for building reli- able thin boards. Further work will have to focus on potential to meet functional requirements, such as the electrical performance and the eco- nomic questions that are corresponding to the manufacturing of these very thin boards. PCB References 1. I. Sager, "Before iPhone and Android Came Simon, the First Smartphone," Bloom- bergBusinessweek.com, 29 June 2012. 2. H. Holden, "Introduction to High-Densi- ty Interconnects," HDI Handbook, BR Publish- ing Inc., 2009. 3. H. Holden, "The HDI Manufacturing Pro- cesses," HDI Handbook, BR Publishing Inc., 2009. 4. H. Holden, "Advanced HDI Structures and Next Generation Technologies—ALIVH," HDI Handbook, BR Publishing, 2009. 5. Joint Industry Standard, IPC/JEDEC J- STD-020D.1: Moisture/Reflow Sensitivity Clas- sification for Nonhermetic Solid State Surface Mount Devices, JEDEC Solid State Technology Association, IPC, 2008. 6. JEDEC, JESD22-A104D: Temperature Cy- cling, JEDEC Solid State Technology Associa- tion, 2009. 7. JEDEC, JESD22-A110C: Highly Accelerat- ed Temperature and Humidity Stress Test, JEDEC Solid State Technology Association, 2009. This paper originally published in the IPC APEX EXPO 2013 Conference Proceedings, under the title, Reliability Performance of Very Thin Printed Circuit Boards with regard to Different Any-layer Manufac- turing Technologies. Some images were omitted. THIN PCBS FOR SMARTPHONES continues figure 18: identified copper dendrite on tV2 layer 8, solder mask partially removed by grinding, uV lamp applied.

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