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October 2014 • The PCB Design Magazine 27 beyond design SIGNAL INTEGRITY, PART 1 OF 3 continues Rule of thumb: Transmission line effects become an important design consideration when the trace length approaches 1/6 of the wavelength of the signal being transported. If the system clock frequency is 300 MHz, then the wavelength in FR-4 is about 0.5 m. Impedance is the key factor that controls the stability of a design—it is the core issue of the signal integrity methodology. At low fre- quencies, a PCB trace is almost an ideal circuit with little resistance, and without capacitance or inductance. Current follows the path of least resistance. But at high frequencies, alternating current circuit characteristics dominate causing impedance, inductance and capacitance to be- come prevalent. Current then follows the path of least inductance. The impedance of an ideal lossless transmission line is related to the capac- itance and inductance: But this is very simplistic and the impedance should be simulated by a field solver (Figure 3) to obtain accurate values of impedance for each signal layer of the substrate. The impedance of the trace is extremely important, as any mis- match along the transmission path will result in a reduction in quality of the signal and pos- sible radiation of noise. For perfect transfer of energy, the impedance at the source must equal the impedance at the load. However, this is not naturally the case and terminations are gener- ally required at fast edge rates to limit ringing. The configuration of the PCB stackup de- pends on many factors. But whatever the re- quirements, one should ensure that the follow- ing rules are followed in order to avoid a pos- sible debacle: • All signal layers should be adjacent to and closely coupled to an uninterrupted reference plane, creating a clear return path and eliminat- ing broadside crosstalk. • There is good planar capacitance to reduce AC impedance at high frequencies. • High-speed signals should be routed be- tween the planes to reduce radiation. • The substrate should be symmetrical with an even number of layers. This prevents the PCB from warping during fabrication and reflow. • The stackup should accommodate a num- ber of different technologies. • Cost (the most important design param- eter) should also be addressed. Figure 3: Impedance simulated by a 2D BEM field solver in the ICD Stackup Planner.