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20 The PCB Design Magazine • December 2014 formance and signal integrity requirements will vary depending on the route density and manner in which you decide to manage the plane layer assignments. Determining the route density is a subject outside the scope of this article; however, as a general rule for large, dense boards, start with 8–10 signal layers and increase them as needed during the routing process. Since the thickness of the laminated core will be limited by the aspect ratio of the buried via (10:1), work with your board fabricator to determine core and prepreg thicknesses. Doing this in conjunction with trying to minimize via pad size for routing will enable you to deter- mine the high-end number of layers available in the laminated core. Design Rules Throughout this paper, the minimum val- ues for via hole sizes, pad sizes and the aspect ratios have been described. These minimums are used as a guide to enable high yields. Mini- mum trace widths and clearances are based upon the fabricator's capabilities; however, are more than likely to be set based on signal in- tegrity requirements such as impedance control and minimizing crosstalk. Fanout Patterns The method used for fanout of BGAs is a subject worthy of its own article, and can sig- nificantly contribute to the success or failure of the design. Here are some considerations: Via location relative to BGA pad • Adjacent (dog-bone) • Partial via-in-pad • Offset via-in-pad • Via-in-pad When using a combination of microvias and buried vias, each via span can have its own pattern within the BGA and as such can affect the routability of the device. • Via-in-pad methods provide the greatest opportunity to increase route density. • Shifting and aligning the vias is likely to improve routability. • Using complementary patterns for the microvias and buried vias can improve routability • The goal should be to reduce the overall "effective" number of pins by the time you get to the laminated core, thus reducing the number of layers required to breakout and route the BGA. Recommended Stackup Criteria A primary driver for going to HDI is to ob- tain sufficient route density to reduce layer count, thus lowering costs and improving reli- ability. Yet this must be done while maintain- ing power and signal integrity. Cost, density, power and signal integrity are the factors used in this paper to determine which stackups are recommended. HDI Cost There are four drivers that determine the fabrication cost for HDI boards. • Materials: Not only the type of material used but also the amount. So obviously a larger board will cost more than a smaller one. • Laminations: The more lamination steps, the higher the cost. When buildup layers and via spans are mirrored about the core, then they can be done in the same lamination step. As you will see in the recommended stackups, the manner in which the via spans are defined affects the number of laminations. • Drills: The more drill setups required, the higher the cost. A through-hole, buried via and a microvia each count as single drill setup. When buildup layers and via spans are mirrored about the core, then the microvia drilling on both sides is considered as one drill setup. The manner in which the via spans are defined affects the number of drill setups. • Plating: Plating steps affects the cost, the more steps the higher the cost. These steps are used to plate the via wall and to ensure a reliable connection at the bottom of the drill. Using stacked vias and additional buildup layers generally increases the number of plating steps. HDI LAYER STACkUPS FOR LARGE, DENSE PCBS continues feature