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14 The PCB Magazine • January 2015 tering, hence electrical conductivity. Plating precursors need an electroless plating step to create the actual track. Hence, such precursor printing only solves part of the problems associ- ated with the conventional approach. In general, the approaches listed in Table I are well established technologies (except for LIFT) and many amongst them are incorporat- ed in industrial processes like PCB production, solar cell production or electronics packaging. To be able to write structures compatibly with advanced IC packaging approaches, a deposi- tion resolution of 1–5 μm is required. As can be seen in the table, this is at least a factor of 10 smaller than most of the existing direct-write figures. Only the LIFT technology shows the potential to overcome this limitation. Laser-induced forward transfer uses a laser to shoot small droplets of conductive materi- al from a carrier onto a substrate, as shown in Figure 1. Such integration requires new interconnect strategies like TSVs, through-mould vias in wa- fer-level packages, redistribution layers for chip- scale ball grid arrays, and all kinds of hybrid approaches to integrate thin silicon chips into foils or laminates. All these applications share the problem that existing industrial patterned metallization approaches are either costly or lack accuracy. Traditionally, in IC manufacturing, a com- bination of sputtering and electroplating is the technology of choice. To create a pattern, the plating process has been combined with one or more lithographic masking and etching steps. Altogether, this combination of processing steps makes this a costly approach, especially when series are small. Further, novel packaging and interconnect approaches typically require metallization at enhanced aspect ratios (e.g., in TSVs, which leads to an even stronger cost increase). At the same time, the total area cov- erage of the structures is often relatively small. Finally, novel packaging approaches are not al- ways compatible with wet processing. Direct-write technologies can form a low- cost alternative approach to create intercon- nects by eliminating mask and etch costs as well as by being more efficient at low area coverage and high aspect ratio. All kind of techniques have been developed to print interconnects. Existing direct-write technologies are summarized in Table 1. In most cases, either a metallic ink or paste (typi- cally containing nano-particles) is used or an ink containing precursor for electroless plating. Metallic inks containing nano-particles require a thermal or photonic treatment to achieve sin- CAN THE ELECTRONICS INDuSTRy uSE 3D PRINTING? continues Table 1: overview of existing direct-write approaches. Figure 1: example of 3D printed electronics. Figure 2: Printed interconnects. FEaturE