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PCBD-Feb2015

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18 The PCB Design Magazine • February 2015 ohms, 16ps delay). The transmission line model is calculated from the individual LC sections of the via transitioning through the layers and is shown in Figure 10. According to documentation, the pad to plane capacitance of the entry and exit layers are not included in the transmission line equivalent of the via, but are represented by a capacitor to ground. 2 Referencing Figure 10, the individual induc- tance and capacitance values are added up to form a lumped model and verified to be approx- imately 56 ohms and 16ps by the following well known equations. 1 After running the wizard with the vias in- cluded, the results show the effective Z0 to be 64.8 ohms, and the optimal termination to be 12.1 ohms. What happens if the via characteris- tics are altered in a way that would better match feature EFFECTIvE CHARACTERISTIC IMPEDAnCE continues Figure 8: The schematic of the series terminated net topology. Figure 9: The via construction and its transmission line equivalent model.

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