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52 The PCB Design Magazine • March 2015 KD: So where has DDR come from, and where is it now? BG: There was DDR2 and then DDR3, and probably 2015 is going to be the transition where most DDR3 designs go over to DDR4. Typ- ically, this happens because the DDR4 memory will actually become less expensive than some of the DDR3 memory. KD: What does that mean as far as the tech- nology from a power standpoint as well as a data standpoint? BG: The main difference from a technology standpoint from DDR3 to DDR4 is the speed. It basically just gets faster. So any application you have in the computer that's run with DDR4 memory will make for a faster computer than one running with DDR3. One of the exciting things that has migrated probably over the last five to seven years is this new version of DDR called LP - DDR, which stands for low power. That's been something primarily used in mobile devices be- cause you certainly don't want your cell phone to run out of power in the middle of the day. KD: With this reference to power, if I under- stand correctly, DDR came from a 2.5 V system and shrunk to 1.8 V and 1.5 V, and DDR4 is down at a little over 1 V. That seems really low already, so where will the LPDDR take us? BG: If you can be- lieve it, the LPDDR4 specification only has a 300 mV swing, so it's really low. That means that for signal integri- ty and power integrity engineers, there's really very little margin left. We said there was very little margin left when it was 1.5 V, and now we're down to 300 mV; this very small swing of data means that your signals have to clean and your power planes have to basically be sta- ble. Because then you have to have a power/ ground bounce associated with simultaneous switching signals. It's going to basically make it so that you're not going to meet the signal quality requirements that JEDEC puts in place for LPDDR4. So designs are getting really inter- esting and what we're excited about this year at DesignCon are the things we've been putting into our tools to enable designers to be able to validate that they've done everything they need to do to meet those LPDDR4 requirements. KD: Let's talk about your tools. Would you give us an overview of some of the advanced tools at Cadence and how you're helping de- signers to solve some of these higher-speed, lower-power issues? BG: Thank you for giving me the opportuni- ty to talk about that because we're really excited about our products. Really, the foundation for the PCB and IC package design technology at Cadence is Allegro. Allegro has been around a long time; it was called Valid a long time ago before Cadence acquired it. So that's been the place where all the actual physical implemen- tation takes place. What we did is layer signal integrity and power integrity analysis tools on top of Allegro, which have been in place since the mid-1990s. They've been serving the market fairly well but a very exciting thing happened in 2012. Cadence acquired a company called Sigrity. Sigrity is well-known for power integrity technology and their tools called PowerDC and PowerSI, which enable both AC and DC power integrity analysis When you merge that together with their signal integrity analysis technology, what we've been able to do is take state-of-the-art, world- class signal integrity and power integrity tech- nology in 2012 and spent the last two and half years not only improving that technology but tightly integrating it with Allegro. Now the Al- legro user base has grown accustomed to hav- ing tools where they can have signal integrity analysis on-the-fly right from the board. We're giving them advanced technology that allows them to run more advanced field solvers, more advanced analysis engines and it might not sound like that much but when we go back to the idea that we only have that 300 mV swing in LPDDR4 an integrated solution is key to con- verging on a working solution. article CADEnCE'S BRAD GRIFFIn DIGS DEEP InTO DDR continues