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16 The PCB Magazine • April 2015 characteristic impedance levels due to thinner dielectric layers. It's essential to make the optimized process selection for minimized pattern resolution and limiting build-up thickness. Plating based pro- cesses must be capable to plate/fill the holes/ vias and to produce fine patterns within design parameter sets. Finer lines, spacing and annular ring re- quires much tighter controls of the imaging process. With use of finer lines, touch up rework or repair becomes an impossible task. Photo tool quality, laminate prep and imaging pa- rameters are necessary for successful high yield process [6] . Increasingly, LDI looks attractive to replace contact exposure for this technology. While today, more than 90% of the production uses contact imaging process as LDI is slower and more expensive, LDI becomes cost effective when it improves the yield. Today's complex NExT-GENERATION ULTRA-THIN HDI PCB MANUFACTURING CHALLENGES continues FeAture Figure 5: line width reduction vs. process technology. Figure 6: Fundamentally higher system resolution and superior conductor geometry of mSaP process.