April 2015 • The PCB Design Magazine 63
5
Azitech to Host Seminar
with Rick Hartley May 5-6
This two-day seminar in Copenhagen, Denmark,
will feature Richard hartley. The signal integrity
guru will focus on issues PCB designers and en-
gineers need to know about to prevent problems
with noise, eMi, and signal integrity. Moreover, at-
tendees will learn how to deal with crosstalk and
grounding problems in high speed digital and
mixed signal designs.
6
Zuken offers PCB Reference
Design for Intel IoT Devices
intel and zuken are engaged in a technical partner-
ship working to address convenience improvements
for designs in zuken PCB design environments that
use intel platforms. This delivery of PCB reference
designs forms just one part of these efforts.
7
Mentor offering Training
in Atlanta, Tampa in April
The agenda will include a description of the "elec-
trical signoff" problem, and an overview of the
hyperlynx tools that address the signoff require-
ments. several short demos will show how easy-
to-use and effective the hyperlynx virtual proto-
typing tools can be. The training will take place in
Atlanta on April 14 and Tampa on April 16.
8
Pulsonix Continues Global
Growth with the
Appointment of 3D Tronic
This announcement continues Pulsonix eDA
software's goal of global expansion. 3D Tronic
boasts a wealth of experience in the eDA indus-
try and this experience will act as a bi-directional
synergy for both customers and the eDA tool
alike.
9
DesignCon 2015 Names Best
Paper Awards Winners
DesignCon has announced the winners of the Best
Paper Awards from its 2015 program. The awards
were divided into four categories: Modeling &
simulation, high-speed signal Design, Power in-
tegrity & signal integrity, and Test & Measure-
ment.
J
Mentor Graphics Launches
New HyperLynx SI/PI
Mentor Graphics Corporation has released the
newest version of the hyperlynx signal integrity/
Power integrity (si/Pi) tool for high-speed PCB de-
signs. hyperlynx addresses high-speed systems
design problems throughout the design flow,
starting at the earliest architectural stages through
post-layout verification.
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April 2015 • The PCB Design Magazine 63
