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10 The PCB Magazine • May 2015 employed. Emulators (synthetic) are representa- tions of a category of product, combining the at- tributes common to the type to avoid concerns about disclosure of specific company-proprietary designs. Technologists from around the world were asked to provide their respective view of the PCB technology required for the emulator. This exercise is critical in developing and un- derstanding roadmaps. As an example, Table 1 below lists the minimum mechanical via hole sizes for the various emulators. Table 2 depicts the maximum aspect ratio of mechanically drilled plated through-holes for the respective emulators. The Challenge It is quite clear from the two tables that there are rather high-aspect ratio vias that must be plated. It is understood that it is desirable to achieve as close to 100% throwing power as possible. At a minimum, market surveys have shown that for reliability, productivity, and performance purposes, a minimum of 80-85% throwing power is required. Further, process engineers desire to minimize plating on the conductor traces in order to minimize under - cut and circuit width destruction due to final etching. For purposes of this paper, throwing power is defined as the minimum electroplated thick- ness in the center of the PTH, divided by the thickness on the PTH surface (excluding copper FEaturE OPTIMIzATION OF ACID COPPEr ELECTrODEPOSITION PrOCESSES continues Table 1: Minimum hole diameter for mechanically drilled vias (mm, rounded to whole number). (source: iPC Technology Roadmap, 2015) Figure 1: Throwing power: 1.0 mil minimum hole thickness and 1.3 mil surface thickness. Throwing power is 1.0/1.3 mil, or 77%.