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20 The PCB Design Magazine • May 2015 Keep the copper pour that resides on the impedance layer a minimum of 3x the cho- sen trace width for impedance; this ensures no unwanted co-planar coupling occurs. At larger trace widths upwards of .012" this distance can be as little as 2x the trace width. Differential Pairs Be sure you match the lengths of each half of the differential pair. Make sure the same space is maintained throughout the run, with the ex- ception of neck-down areas at the terminations. Be careful when terminating differential pairs that you do not create same net space vio- lations where smaller traces (neck-downs) ter- minate. See Figure 1. Q: Why is this a problem? A: If the same net space violation is LESS than the fabricator's specified minimum space value and the fabricator is not aware these neck- down areas are part of larger/longer differential pairs, they may "fill" the space violation. Q. And why, exactly, is that a problem? A. If a fabricator "fills" in the same net space violation, we have just changed the LENGTH of the differential pair! Having said that, a fabricator will not solve for these small neck-down sections, only the larger, longer run of the same diff pair. This is true of SE structures as well. Really, anything less than about .3mm in length cannot be con- trolled to any great degree. The same is true for surface single-ended or differential pairs that have the vast majority of the run on one layer and only pick up the diff pair on the opposing side in very short lengths. What are some reasons a fabricator may ask for a wider impedance tolerance? • For lines less than .1 mm: Here, many times a fabricator asks for +/-15%, but not be- cause they think they are not going to hit the number. Remember that 10% of a .1 mm trace is 4/10 of a mil, less than half a mil! Hence many shops ask for 15% for traces .004" and below. • Additionally, the fabricator may ask for 15% due to less-than-predictable surface finish- es. Let's say the part has either epoxy-filled or silver-epoxy-filled vias and the fabricator is out- sourcing. The epoxy or silver-fill process itself requires that the material be pushed into the holes under pressure. After curing, they typi- cally "planarize," basically grinding down the surface so it is flat, and herein lies the rub. If the planarization process is not perfect, there can be quarter to half a mil difference end-to-end on the surface topography, making it more dif- ficult to properly predict impedances. The 10 Do's and Don'ts 1. Do consult with your fabricator regarding any controlled impedances at your earliest pos- THE DO'S AND DON'TS OF SIGNAL ROuTING FOR CONTROLLED IMPEDANCE continues Figure 1: Differential pairs create same net spacing violation at termination points. the bare (board) truth

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