Issue link: https://iconnect007.uberflip.com/i/520182
June 2015 • SMT Magazine 11 HIGH-DenSITy InTeRCOnneCT AnD eMBeDDeD BOARD TeST continues PCB. Today, the size of a PCB via has shrunk to microvia and stacked microvia. Also, the coun- ter bore via has been introduced to minimize capacitance and regain signal fidelity for speeds greater than 5 Gb/s. A combination of some or all of these vias is used to deliver a HDI PCB. Warning: Challenges Ahead Placing the fine pitch array packages on the HDI PCB and achieving 100% solder attach- ment with single-digit defect parts per million is a science. It requires the use of the correct sol- der paste composition, accurate SMT placement and a magic recipe heat profile for the multi- stage reflow oven. Multiple vision systems are now commonly used inside SMT placement equipment to accurately align components to PCB pads. Standalone AOI equipment is also part of today's SMT line to review solder pre- reflow paste and/or post-reflow joints. Some- times a manual or automatic X-ray vision in- spection system is used to review post-reflow solder joints underneath IC array packages that are not visible to AOI. HDI designs incorporating 3D ICs increase the number of non-visible solder joints on the PCBA to the detriment of AOI effectiveness and consequently, its utilization. AXI utilization is also reduced due to its ineffectiveness to sepa- rate solder joints across three planes: inside the 3D IC package, the 3D IC package attachment to the PCB, and the bottom side PCBA solder joints. Because of this, the onus of ensuring PCBA manufacturing quality shifts to electrical tests like in-circuit test and functional test. Unfortunately, the adoption of a 0.4 mm pitch array package reduces the accessibility for electrical tests as surface traces are shifted into the HDI PCB inner layers. ICT test cover- age therefore diminishes, pushing FT to com- pensate. However, using FT to make up for the missing test coverage typically means longer test development and test times, which in turn increases cost. The challenges associated with HDI PCBA post-reflow test are summarized in Figure 3. HDI PCBA designs are prevalent today with one fine (or very fine) pitch array package for Feature figure 2: A 0.4 mm pitch array package cannot accommodate a pcb trace in between the solder balls. Figure 3: Shown here are the post-reflow test challenges for hDi PcBA.