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28 SMT Magazine • August 2015 produced, the consequences of failure and the end-use environment. A three-phase approach is commonly used to specify the manufacturing process requirements [4] . • Phase 1: Screening experiments with inexpensive test vehicles • Phase 2: Validation experiments with more representative test vehicles • Phase 3: Verification runs on manufactured assemblies The purpose of this article is to develop an improved test method to measure the resistance on non-cleaned and cleaned test boards using low residue solder pastes under a series of bot- tom termination components. Testing the loca- tion, flux type, quantity and mobility may pro- vide an improved risk assessment of reliability expectations. The problem is that current chemical and electrical test methods limit the effectiveness for testing residues entrapped under compo- nent terminations. Residues under the bottom termination have the highest potential for leak- age and are the least understood. Site-specific testing of the residue under the component ter- mination has the potential to detect resistance drops. Gaining a better understanding of no- clean residues that do not outgas during reflow will help reliability engineers understand clean- liness at the interface. Why Does Device Cleanliness Matter? Insufficiently cleaned electronics can cause problems due to intermittent connections, cor- rosion, electrical shorts and arching. These ef- fects can negatively impact device functional- ity and end-user requirements. A wide range of contamination sources can be found in many places, including fabrication residues on com- ponents, post-soldering flux residues, process- ing equipment, cleaning machine effectiveness, rework, etc., and requires a flexible evaluation approach. Bottom Terminated Components Typical parts soldered onto the PCB have flux residues trapped between the component body and board (Figure 2). Cleanliness at the interface is critical to reliability and the least understood [3] . Ionics in flux residue can exac- erbate contamination levels under the compo- nent and/or creation of high resistance shorts across pads. Generally clean does not mean the prod- uct is clean where it matters most. Location of residue matters. Residue pooled under the component may still be active and ionic in na- ture. Pockets of contamination are influenced by flux type, placement, wash characteristics, solder paste volume, PCB cleanliness and com- ponent contamination. These factors create a "multi-variable" issue that is challenging to un- derstand. Experimental Design This designed experiment seeks to quantify the influence of surface insulation resistance (SIR) on a specific set of ionic species and no- clean flux residues under bottom terminations. The intent is to explore SIR as it relates to spe- cies type, species concentration and conductor spacing. The output of this testing will be quan- tifiable relationships between: 1) Ionic Concentration vs. SIR 2) SIR vs. Conductor Spacing These outputs will be used to further de- velop this method with the goal of improv- ing industry guidelines for maximum ionic concentration levels for given board densities/ conductor spacings. It will also be used to pro- duce minimally acceptable SIR (cleanliness) levels. The test board has sensors placed under the bottom termination. The sensor traces provide real-time SIR data within the residue. Locally HOW CLEAN IS CLEAN ENOuGH TO ACHIEvE RELIABLE ELECTRONIC HARDWARE? continues FeAture figure 2: residue under bottom termination.

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