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50 SMT Magazine • August 2015 PCB Warpage Data In an effort to make sure the PCB is not the root cause of the defect, three of the cases were able to collect corresponding PCB warpage data. Figure 15 shows the PCB warpage data cor- responding to case study 4. In the analysis of the PCB and the specific location of the BGA, it was found that the warpage was 0.04 mm (1.6 mil) at reflow. Upon review both the participat- ing member and a subject matter expert con- cluded that the PCB warpage contribution was negligible and by extension not the primary source of the defect. Warpage data of the PCB for case 5 was col- lected in a numerical format rather than graph- ical format like that of the previous example. Table 3 is an example of measurements of one of the six test sites on the same PCB. Overall, the six sites measured, the maximum warpage recorded between 150°C and peak reflow was 0.041 mm (1.6 mils). Here, too, the authors agreed that the PCB was not the root cause of the HoP defect observed in this case. Finally, for case 6, two of the PCBs were sent for Shadow Moire analysis. Two sites on each PCB were measured and found to have maxi- figure 15: Warpage measurement result of the pcb site for case study 4. WARPAGE ACCEPTANCE PROPOSAL continues FeAture