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18 SMT Magazine • August 2015 Strategies for Prevention of HiP and NWO: Area Array Package Factors Some area array packages are more prone to warpage than others, due to the materials and design used by package fabricators. Component warpage can be difficult to predict and measure, and the current industry standards on warpage control are insufficient to prevent HiP defects in many cases [2] . Discuss the methods used to measure characteristic warpage on an area ar- ray package. This measurement cannot be per- formed during an actual reflow process, so un- processed parts must be tested and a statistical model of a component's typical warpage can be formed. In the six case studies pre- sented by Chan et al., it was dem- onstrated that the characteris- tic warpage measured in cases where HiP was encountered did not exceed package warp- age requirements from JEDEC and JEITA. In other words, a perfectly good (per industry standard requirements) area array package can be a risk fac- tor for HiP and NWO! This fact is important to un- derstand when suddenly pre- sented with HiP and/or NWO on a new assembly or new package when used in a pro- cess that has not historically ex- perienced these types of defects. Most external observers are quick to blame the assembly process upon discovery of a new defect. When the characteristic warpage of a component exceeds the limits necessary to cause HiP/NWO, very little can be done from a reflow process modification standpoint to miti- gate the defects. The physics involved are quite complicated and it is very difficult to predict how a change in a reflow profile will affect that warpage of a component. Most commonly, any steps that can be effective in reducing warpage are far outside the requirements to ensure a ro- bust solder reflow process. One strategy that can be effective in mitigat- ing HiP and NWO caused by warpage is to mod- ify the amount of solder paste printed to the affected locations. Tibbetts and Antinori discuss a mathematical model used to calculate the op- timum solder paste deposit volume to combat a case of HiP on a package that has exhibited a tendency to warp during reflow [3] . The desired volume of solder varies across the package lay- out in response to the amount of warpage the package experiences during reflow. Their work demonstrates that there is a relationship be- tween solder volume, component warpage, and tendency to form HiP defects. Since the assem- bler can control solder paste volume but not component warpage, the strategy presented by those authors is one that takes advantage of the factors that can be controlled in an attempt to mitigate the defects. Strategies for Prevention of HiP and NWO: Solder Paste Materials Some solder pastes are more robust to HiP and NWO formation than others. As dis- cussed earlier as part of the process factors that can lead to HiP, water soluble formula- tions tend to be less robust to these defect conditions than their no-clean counterparts due to the no-clean pastes' inherently larger process win- dow under reflow. However, within the family of no-clean solder pastes there can be a sig- nificant difference in performance with respect to HiP and NWO related to the physical properties of the pastes. The key properties of a solder paste that mit- igate HiP and NWO defects are the paste's adhe- sion to the PCB land and package bump and the elasticity of the solder paste during reflow. If a paste is able to stay in contact with both ends of the desired solder connection, the chances of forming a defect are greatly reduced. A HiP defect that is caused by a separation of the paste from the bump during reflow can be prevented if that paste is tacky enough to stay in contact with the bump as warpage develops. The same goes for NWO defects caused by the paste pulling away from the PCB land; ensuring that the paste remains in contact with the land FeAture THE WAR ON SOLDERING DEFECTS uNDER AREA ARRAY PACkAGES continues the key properties of a solder paste that mitigate HiP and nWo defects are the paste's adhesion to the PCB land and package bump and the elasticity of the solder paste during reflow. " "