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32 SMT Magazine • August 2015 trace (7 to 9, 8 to 10) provides insight into the SIR over a .015" gap (.005" space + .005" trace + .005" space). With a total of 13 conductors, the effects of conductor spacing can be evaluated for .005", .015", .025" and .115" spaces. It is expected that the SIR for .005" will be substantially lower than that of .075" simply because there is a larger gap. The ability to vary conductor spacing will allow for the sensitivity of cleanliness levels to be as- sociated with the density of the components on a board. A more densely populated board or one with fine pitch BGAs, for example, would have a more stringent SIR requirement than a board that uses only through-hole technology parts. The increase in conductor spacing could realize a decrease in SIR stringency. For this study, 5 and 15 mil spacing located at the center of the array was measured. Noise Effects on High-Impedance Measurements High-impedance meters measure resistance levels greater than that of polyimide or FR4 ma- terials. For this testing, a representative voltage is applied across the test traces, and the current is measured. The equipment performs a quo- tient between the supplied voltage and mea- sured current to determine the equivalent im- pedance. Representative voltages in a digital cir- cuit tend to be 2.5–5.5V, and thus justifies that the supplied voltage be of an equivalent value. At 5.5V, a 1 MΩ resistor draws 5.5 µA of cur- rent—easily measured by standard equipment. Data Findings Flux Testing Results Three solder pastes supplied by a common flux manufacturer were selected to have low, medium, and high activity flux compositions. These designations were provided by the flux manufacturer based from their knowledge of the flux formulation. Three boards of each flux were cleaned using an aqueous cleaning agent in an in-line washer at 15% cleaner concentra- tion at 150°F. The cleaning agent selected was known from experience to be capable of remov- ing all of the flux from underneath these com- ponents. The belt speed of the in-line was var- ied to give different levels of cleaning. The belt speeds selected were 1-ft./min which provided complete cleaning of the flux residues, 5-ft./ min which provided partial flux removal, and 8-ft./min which provided virtually no cleaning. Following the aqueous cleaning process, the re- sistance between four sets of adjacent traces and four sets of alternating traces was measured. The measurements were carried out using ambient office environmental conditions (20–25°C and approximately 30% RH). Due to capacitive effects a stepped DC volt- age waveform was applied. The +3.3V DC bias was applied for 15 seconds prior to a current measurement. The voltage was then switched to -3.3V for 15 seconds before another current measurement was made. This was then repeated FeAture HOW CLEAN IS CLEAN ENOuGH TO ACHIEvE RELIABLE ELECTRONIC HARDWARE? continues figure 6: residue remaining under bTc as a function of cleaning time: 1-ft./min (top); 5-ft./min (center); 8-ft./min (bottom).