Issue link: https://iconnect007.uberflip.com/i/553274
36 The PCB Design Magazine • August 2015 Caravajal: Right, we start at that level, and part of what Per was talking about is a version of RF concurrent designs. Some of our most strategic partners in RF design, like Keysight Technolo- gies, formerly Agilent and HP with the Ansys HFSS software, need these things for their en- gineers. They produce data, but it has to be implemented. So that connection is critical. Sometimes it's over the wall, and sometimes it's highly automated. What Per was talking about was highly automated co-design to support RF designers in a Mentor PCB flow. Then there are people who implement FPGAs, people who implement a whole system in a package. We need to be able to support concurrency across domains and different disciplines. That is a con- stant ongoing data and integration issue. Matties: another big issue designers cited was not having enough real estate for the functional- ity requirement that's being placed on them. Caravajal: You have the concept. But let's say if I wanted to use an SoC for more functionality, I could put the design functionality on a single large SoC, if possible, or a couple of SoCs, such as processor, memory, and IO, and assemble this on a system-in-package for a targeted PCB form factor like a PC. You may also want to ex- plore other form factors for automotive, tablets, phones and wearables. What you're really talk- ing about is where we're going and being able to integrate the cost and performance domains from RFIC/package/board. That's kind of dis- ruptive technology, because traditionally these design considerations are thrown over the wall. PCB system design methodology is running into limitations going over the wall—time to market, being able to design it cost-effectively and achieve performance goals that you want. What is needed is a way to capture IC-package- board that could have a processor, memory, RF, IO and other IP blocks. Then collect the electri- cal data for consideration, get it into a "design cockpit" where I can do my trade-offs and opti- mization. That's what we call our Mentor Xpe- dition Package Integrator. Again, it's a form of concurrent design or co-design. You don't want to build something that no one can afford, so you have to think about the cost of the package. The other really burning issue that's impacting the semiconduc- tor guys is that it's very costly to build higher- density chips, meaning millions to hundreds of feature MENTOR GRAPHICS HELPS BRIDGE GAP BETWEEN PCB AND RF continues Figure 3: Graphic showing integration of software, mechanical, and electronic systems.