Issue link: https://iconnect007.uberflip.com/i/553274
38 The PCB Design Magazine • August 2015 millions of gates. Do we really need to do it that way? Can we possibly get the same results but kind of slice and dice it? I really could bring the memory in as a separate chip, the processor as a separate chip, and put it into a small pack- age and accomplish the same goal at a price point, reliability point, and thermal point that we want. It's all spec-driven. If somebody comes with a concept and says, "Here are my thermal constraints. I don't want it to burn my hip or my face, and I want it to last on a bat- tery three days." All these things have to be gathered together, optimized, and af- fordable. Part of affordabil- ity is manufacturability. So we addressed that even from a manufacturing aspect. We went from concept to prod- uct going out the door and hitting the enterprise system for PLM systems. Matties: that's exactly what we're talking about, right? Caravajal: Yes, and I'm using it right now for ICs, package, and boards. Per could be us- ing this from the RF design- ers for the RF implementation, it's the same concept. Today we have a lot of great tools. They are domain-oriented, domain IC, package, and board. This is about breaking down whether you want to do Internet of Things. You want more stuff in a little package and wearable and to hit all these constraints. We've got to break these walls down. Really it is exchanging data and not just pushing it one way and waiting. Matties: it's reciprocating. But you guys deal with these guys all the time. Why don't more people get this? Caravajal: Very large companies that build pro- cessors and phone chips do get it. Right now, I would call it the early adopters stage. They know they have to do this because otherwise the product they get out the door might cost too much, or may not work as well as possible. Matties: if you're managing a supply chain of partners, that creates a whole different set of chal- lenges. are we seeing the landscape change where companies are bringing in more engineering and more manufacturing in a captive environment just to accomplish this sort of process? Caravajal: It's another form of that, right? It's concurrency and engineering data with your supply chain. Yes, all these things are trying to be optimized by what I would call world-class leaders in the semiconductor market- place. When you think about world-class semiconductor companies, they just don't build a chip for the fact of building a chip. Intel doesn't build a processor and say, "Who wants to use this?" They build a whole ecosys- tem—how it fits on a board, how it thermally models, how it electrically models, and what performance level their customers need. People who build phone chips do the same thing. No more ordering it from a catalog of chips. They have a co-design environment with their partners and their customers. Matties: how does tier 2 fit into all of this? We understand tier 1 has the resources, but tier 2 may not. Caravajal: Tier 2 probably will look for more on- call programmable fabric. I mentioned Altera and Xilinx, and those guys have the concept to make this for the masses—the Tier 2, Tier 3 players. What they can do is take a processor, an FPGA, and a memory and say, "I'm not going to tell you what software to put on this, and I'm not going to tell you what application to put on it. It has a processor, a DSP and some I/O for today we have a lot of great tools. they are domain-oriented, domain IC, package, and board. this is about breaking down whether you want to do Internet of things. You want more stuff in a little package and wearable and to hit all these constraints. We've got to break these walls down. really it is exchanging data and not just pushing it one way and waiting. " " feature MENTOR GRAPHICS HELPS BRIDGE GAP BETWEEN PCB AND RF continues