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44 The PCB Design Magazine • September 2015 Sherlock performs the following stress, wearout or overstress failure simulations and risk assessments: • FEA vibration modal analysis— stress assessment • FEA shock modal analysis— stress assessment • Thermal cycling fatigue of solder joints— wearout failure mechanism • Thermal cycling fatigue of plated through hole vias—wearout failure mechanism • Mechanical vibration fatigue of solder joints—wearout failure mechanism • Mechanical shock fracture of solder joints—overstress failure mechanism • Conductive anodic filament formation— risk assessment • Thermal derating Examples of real-world failures that this type of analysis can detect and prevent are shown in Figure 4. Case Study An automotive OEM that has now owned Sherlock for over two years performed a before and after study on four assemblies that used Sherlock this past year. Before purchasing Sher- lock the company used the classic D-B-T-F reli- ability process for DVT. For the year that Sher- lock was used on the four assemblies the OEM calculated it saved an average of $346K/PCBA. The saving was just for the reduced testing done in DVT. It did not include savings of getting the product to market more quickly. The total saving for the four assemblies was over $1.3 million. But, most importantly, the OEM feels that they are providing a more reliable, durable product to their customers. Meanwhile, other automotive OEMs are working with their Tier 1 suppliers to evaluate using Sherlock to improve their products' reli- ability. The OEMs are determining if the Tier 1 passes a Sherlock analysis with the OEM's en- vironmental conditions whether they can give the Tier 1 credit for passing their first EVT. This is a win/win/win. The OEM gets a bet- ter product at less cost with better reliability data. The Tier 1 supplier gets a deeper commit- ment from the OEM. And the customer gets a better automobile at a lower cost. Physics-based modeling is the way of the future to make au- tomotive electronics reliable, durable and cost- effective. PCBDESIGN Figure 4: examples of typical circuit board structural failures: (a) cracked copper barrel wall in a signal carrying plated through-hole via, (b) solder attachment crack at a surface mount resistor, and (c) solder ball crack in a BGA integrated circuit. James G. Mcleish is a partner and manager of the Michigan office of DfR Solutions, a QRD engineering consulting, failure analysis and labo- ratory services firm that is a leader in providing PoF expertise to the global electron- ics industry. For further information he can be contacted at jmcleish@dfrsolutions.com. Tom o'Connor is the software sales manager for DfR Solutions. O'Connor can be contacted at oconnor@dfrsolutions.com. feature PHySICS oF FAIluRE DuRABIlITy SIMulATIoNS FoR AuToMoTIvE ElECTRoNICS