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32 The PCB Magazine • June 2016 impact to the required electroless copper depo- sition thickness. In case of a pattern plating scenario (AM- SAP), 0.35 µm to 0.5 µm deposited on the panel surface are not sufficient to ensure a high pro- duction yield due to several copper etching steps prior to the via filling. The risk attached is voiding primarily at the bottom of the BMVs due to a thin electroless copper layer that might be completely etched away by the acid pre-treat- ment during the electrolytic plating process. To prevent this, manufacturers tend to increase the deposition thickness on the surface up to 1.0 µm or even more to increase the process safety, but to the disadvantage of a thicker copper layer that needs to be (differentially) etched. Another, more cost-effective way is an elec- troless copper process with increased throwing power for process safety especially at the bottom of the BMVs, the most critical area for voiding. The required absolute electroless copper thick- ness in the BMV could be achieved while in- creasing the thickness at the surface only mar- ginally compared to current copper thicknesses targeted in panel plating. As a result, the fine line resolution is improved. Table 1 summarizes the main process require- ments for electroless copper processes targeting the high-end IC substrate manufacturing as well as HDI application by AMSAP technology. HIGH-THROW ELECTROLESS COPPER—NEW OPPORTUNITIES FOR IC SUBSTRATES AND HDI MANUFACTURING Figure 2: Comparison of the differential etch of panel plating versus AMSAP technology. Figure 3: Process flow comparison of panel plating and AMSAP technologies.