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June 2016 • The PCB Design Magazine 87 5 Cadence Paper: Automating Inter-Layer In-Design Checks in Rigid-Flex PCBs Flexible PCBs (flex/rigid-flex) make it possible to create a va- riety of products that require small, lightweight form factors such as wearable, mobile, mili- tary, and medical devices. This paper discusses some of the key challenges to address and also introduces a new PCB design approach that enhances productivity. 6 The Partnership: Design Engineers and PCB Designers Randy Faucette is founder, presi- dent and director of engineer- ing at Better Boards Inc. in Cary, North Carolina. Founded in 2003, Better Boards provides electrical engineering, PCB design, signal and power integrity analysis, and a variety of other services. I asked Randy to talk about some of the occasional tension between PCB designers and design engineers, and what he thinks can be done to help open the lines of com- munication. 7 Zuken Introduces Perfect Springback Routing in CADSTAR 17 Zuken has rolled out rout- ing enhancements in the latest version of its CAD- STAR desktop PCB design software. Other productiv- ity enhancements include improved routing pat- terns for differential pairs, and etch factor support. Jeroen Leinders, CADSTAR worldwide sales man- ager, said, "CADSTAR 17 challenges the view that PCB Desktop software has to be complicated." 8 Read the DesignCon Award-Winning Paper by Mentor Graphics and Wild River Technology This paper, "BER- and COM- Way of Channel-Compli- ance Evaluation: What Are the Sources of Differenc- es?" won the DesignCon 2016 Best Paper Award. It was written by Vladimir Dmitriev-Zdorov, Chuck Ferry, and Christian Filip of Mentor Graphics, and Alfred P. Neves of Wild River Technology. 9 Beyond Design: DDR3/4 Fly-by vs. T-topology Routing JEDEC introduced fly-by topology in the DDR3 specification for the differ- ential clock, address, command and control signals. Fly-by topology sup- ports higher-frequency operation, reduces the quantity and length of stubs and consequently improves signal integrity and timing on heavily loaded signals. Fly-by to- pology also reduces SSN by deliberately causing flight-time skew, between the address group and the point-to-point topology signals, of the data groups. Barry Olney explains. J SiSoft: Optimizing the State of the Art In the 20 years since its founding, SiSoft has been at the forefront of signal integrity analysis tool development. Now, the compa- ny is leading the way with a new technology called OptimEye and tools for creating accurate IBIS- AMI models. At DesignCon, I caught up with Todd Westerhoff, VP of semicon- ductor relations, and asked him to give us an up- date on the company's newest technologies. for the latest circuit design news and information—anywhere, anytime.

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