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34 The PCB Design Magazine • September 2016 distorting the signal, reducing bandwidth and closing the eye. Vias can appear as capacitive and/or induc- tive discontinuities. These parasitics contrib- ute to the degradation of the signal as it passes through the via. At high frequencies and with thick backplane substrates, it is imperative that these issues are addressed. Back-drilling typically requires specialized equipment, and further requires that the back- drill be precisely located over the vias. As such, the back-drilling process, especially two sided back-drilling, is expensive due to drill breakage and yield issues and is very time-consuming. 2. Blind and Buried Vias Blind vias connect the outer microstrip lay- ers to one or more inner stripline layers and may have a central reference plane between the signal layers providing a very low inductance return path. The holes are laser drilled and are typically 3-4 mils diameter. Blind vias behave like a lumped capacitor with very little induc- tance. And because the microvia hole is very small, it has less capacitance than a standard PTH via. On the other hand, buried vias are used to make connections between the inner stripline layers only and may have short stubs. They have more capacitance than a standard PTH, be- ing typically 8 mils diameter, but may still have a short stub that cannot be back-drilled from top or bottom. They may not be appropriate for high frequency design. 3. Remove Non-Functional Pads Non-functional pads are pads on internal layers that are not connected to any signal or plane on that layer as illustrated in Figure 2. There is an ongoing debate regarding the influ- ence of non-functional pads on PCB reliability, especially as related to barrel fatigue on PTH vias with high aspect ratios. The primary reason is to improve the fabricators' processes and yields as it helps manage Z-axis expansion of the board due to coefficient of thermal expansion (CTE) stresses. There is also the possibility of a short- circuit, to a plane, due to a gap in the prepreg fill, when no pad is present. However, removing non-functional via pads reduces via capacitance by approximately half, which in turn, increases impedance. So from a signal integrity point of view, this is a positive. But, check with your pre- ferred fabricator before implementing this. 4. Increase the Antipad Diameter If you follow the IPC standards, then an an- tipad should be 20 mils larger that the via pad diameter. However, this is not always possible (in fact very rare) in a densely packed multi- player PCB using fine pitch BGAs. For an 8 mil via hole, the pad is typically 16 mil with an antipad of 26 mil. This allows a 9mil clearance around the pad, resulting in high plane to via capacitance. Increasing the size of the antipad, also reduces capacitance but at the same time, may well make Swiss cheese out of the reference plane. This increases the DC drop and reduces the amount of instantaneous current available to simultaneous switching devices, which is highly detrimental from a power integrity per- spective. Another alternative, that may not be very practical, is to back off the clearance to the plane, on the stub section of the via, reduc- ing capacitance. However, this would have to be implemented manually in the PCB tool and would leave the planes, in the stub section, with wide holes reducing the effect of a solid reference plane. So if increasing the size of the antipad is not advisable, then creating an oblong antipad may be a compromise. An oblong antipad still reduces the parasitic capacitance significantly. But at the same time, it allows the return cur- rent to flow directly between the vias to reduce loop inductance and preserve the continuity of the reference plane. Most PCB design tools will HOW TO HANDLE THE DREADED DANGLERS, PART 2 Figure 2: Non-functional via pads are removed on the right.