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54 The PCB Design Magazine • October 2016 match the transmission line impedance. Given that the impedance of the transmission lines has been established, how do we calculate the value of the series terminator required for the configuration? The source impedance from the IBIS model of the driver needs to be determined. I defined this method in detail in a previous col- umn. Basically, the series element is given by: Impedance matching slows down the rise and fall times, reduces the ringing (over/under shoot) of clock drivers and enhances the signal integrity of a high-speed design. 3. Power Distribution Network Impedance Now that the stackup impedance and ter- minations have been defined, to provide stable signal propagation, we need to ensure that the power planes and associated decoupling can handle the high switching current demanded by the processor and memory devices. Inadequate power delivery can exhibit intermittent signal integrity issues. These include high crosstalk and excessive emission of electromagnetic ra - diation, degrading performance and reliability of the product. The PDN must accommodate variances of current transients, with as little change in power supply voltages as possible. So, the goal of PDN planning is to design a stable power source for all the required power supplies. As with stackup planning, the PDN design is re - quired before a single IC is placed on the board. ROCK STEADY DESIGN Figure 4: Ringing is reduced dramatically by adding a series terminator (simulated in HyperLynx).