Issue link: https://iconnect007.uberflip.com/i/746712
20 The PCB Magazine • November 2016 If you reduce some of the variables in this equation (Equation 1), then the resulting rout- ing density will go up by the percent indicated in Table 1. The largest effect on density is re- ducing the trace width, but this can come with electrical issues, the second-best way to increase density is the reduce the vias annular ring, but very small AR will significantly reduce the vias reliability. Therefore, landless is an excellent way to achieve higher density with reducing trace widths or spacings. Because the number of through-holes on a multilayer block numerous routing channels all through the board, the use of blind and buried vias can significantly increase a layers routing density, on the order of 2x to 4x without their use. This is also measured by layout efficiency (L.E.), the amount of space used for routing as compared to the entire area on the signal layer. L.E. is also enhanced by blind and buried vias, to the order of 2x to 4x. The L.E. for a TH multi- layer is 8% to 10%; 16% with TH and blind vias; to 24% for TH/with 2-sided blind-vias and mul- tiple build-up layers. Some of the contributions to increased density, including the maximum number of traces available for various routing channel widths as a function of via diameters, annular rings (including landless) are seen in Table 1. Landless Vias I saw my first landless via multilayer while visiting NEC at Toyama, Japan back in 1985 [1] . They were an enormous automated facility mak- ing Japanese telecom and mainframe computer boards, kind of like IBM and Western Electric rolled into one. NEC was using the liquid elec- trophoretic, positive-acting photoresist process with panel-plating. I wouldn't see another land- less via multilayer until our Japanese partner (OKI) introduced it to us in 1988. OKI was using landless vias to achieve higher density without having to pay the extra costs of finer lines. They knew about the higher reliability that resulted; they had done their own testing (Figure 1) but were after the higher routing density. These vias are seen in Figure 2 and it allowed them to route five traces between 0.100 inch PTH centers. Table 1: Effect of PCB design rules on routing density on one layer. Figure 1: Reliability data from NEC on their landless via fabrication process [1] . INNOVATIVE USE OF VIAS FOR DENSITY IMPROVEMENTS