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January 2017 • SMT Magazine 33 EFFECT OF SOLDER COMPOSITION, PCB SURFACE FINISH AND SOLDER JOINT VOLUME for comparison. Characteristic failure modes for each solder alloy/board finish combination are identified. Experiment Preparation Test Board Assembly A revised test board design is used for this study rather than the previously used JEDEC standard drop test board. In the multi-compo- nent JEDEC drop test board design, the stress distribution experienced during drop is not identical for all the components making anal- ysis and interpretation of results difficult. The test board used is constructed of 6-layer 370HR laminate material with a body size of 77 x 77 mm. The boards were sourced with either Cu- OSP or immersion Ag surface finish. The Chip Array BGA256 test component has a body size of 17 x 17 mm. The BGA footprint is full array with solder mask defined pads on a 1.0 mm pitch. The component surface finish is electrolytic NiAu. It is assembled to the test board in either the BGA or LGA (solder paste only) configuration. The five solder alloys evaluated, in order of decreasing Ag content, are SAC305, SN99CN, SAC105, SAC-M, and SN100C. Solder alloy com- positions are listed in Table 1. For those samples evaluated in BGA format, the component ball attach process was performed in the Universal Instruments SMT laboratory using 16 mil (400 µm) spheres. A solder paste print process is used for subsequent assembly of the balled compo- nents to the test board using pastes with com- positions matching the associated ball alloy. All assemblies are reflowed in a nitrogen environ- ment with a peak temperature of 239°C. LGA components were attached using an analogous paste-only SMT assembly process. Sixteen sam- ples for each combination of solder alloy (five), surfaces finish (two) and joint configuration (two) required the assembly of 320 test boards. Fifteen boards are dropped for each experimen- tal cell with the remaining board allocated for initial microstructure inspection. Board Design and Failure Detection The assembled test board is shown in Fig- ure 1 Each corner of the board has two input channels connecting the outermost corner BGA pad from two sides. In the assembled structure, a continuity monitor signal passes through cor- ner joint A and adjacent joint B into ground as shown in Figure 2. Electric resistance of the in- put channels to ground is monitored during drop events. If either input 1 or input 2 fails, followed by the other failing after some addi- tional drops, the likely failure mode is pad cra- tering. It indicates cracks inside the test board laminate propagating from one side to the oth- er severing the two copper traces in sequence. On the other hand, when both channels fail at the same time, solder fatigue in corner joint A or other failure path around adjacent joint B would be the presumed failure mode. Experi- ence indicates that adjacent joint B is unlikely Table 1: Solder Alloy Compositions. Figure 1: Assembled test board (77 mm ×77 mm) with two monitor channels (input, output) accessible at each corner.