Issue link: https://iconnect007.uberflip.com/i/770652
54 The PCB Magazine • January 2017 ELECTROPLATED COPPER FILLING OF THROUGH-HOLES: INFLUENCE ON HOLE GEOMETRY ilar reasons. In the case of thicker panels, it re- quires more time for the bridge to build enough to provide vias of optimum aspect ratio. It logi- cally follows that combining both large diam- eter holes with thicker substrates will result in more total plated surface copper than a thinner substrate with smaller diameter holes. This is il- lustrated in Figure 11. Plated surface copper for the thinner core material was 35 µm while the thicker core material was 93 µm. Another important characteristic of the cop- per plated through-hole is the dimple size, es- pecially if vias will be stacked or planarization is not desired. Figure 12 illustrates the main ef- fects plots of hole diameter and panel thickness on dimple size. Dimple size, as with total copper surface plating, is greatly influenced by hole diameter and panel thickness. Dimple size increases greatly with holes greater than approximately 0.25 mm in diameter and with panel thicknesses of greater that approximately 0.4 mm in thickness. The increase in dimple size with hole diameter is due to the geometry of the vias formed in these larger holes after bridging. The larger diameter, lower aspect ratio holes will have more of a tendency to conformal plate due to the mechanisms of via fill previously discussed (Figure 13). The increase in dimple size with panel thickness is due to the greater time in forming the bridge and getting an acceptable via while controlling the plated surface copper within reasonable limits. Figure 14 illustrates this ef- fect on 0.35 mm holes in 0.25, 0.40, and 0.80 mm core materials where plating was stopped as the maximum allowed plated surface copper was reached. Limited work was done on the effect of the pitch of an array of holes on copper through- hole filling in terms of dimple size. The results are summarized in Figure 15. The results indicated that, for a set hole di- ameter and panel thickness, the lower the pitch of the through-holes (higher hole density), the larger the resulting dimple size. The reason for this phenomenon is that high-density arrays can be considered high surface area features. As such, they will act as lower current density areas requiring longer times and/or higher cur- rent densities to meet minimum requirements versus isolated areas. The physical properties of copper deposit- ed in the copper through-hole fill process are Figure 11: Effect of substrate thickness on surface copper. Figure 13: Effect of hole diameter on dimple size. Figure 14: Effect of panel thickness on dimple size (0.25, 0.40, and 0.80 mm core). Figure 12: Main effects plot for dimple size.