Issue link: https://iconnect007.uberflip.com/i/773715
28 The PCB Design Magazine • January 2017 Shaughnessy: So, what can PCB designers do to make the fabrication process go smoother? Ferrari: The most important item that a de- signer can do is to talk to their fabrication and assembly suppliers. Ask them about how your design practices are affecting their ability to manufacture with low yields and high reliabil- ity. Most important is to find out the areas that are the most troublesome. The designer has many ways to attack a given issue, and may be able to select a design solution that is easier to manufacture, resulting in higher reliability and lower cost. This is most important when do- ing a new design utilizing a technology that is new to the company. Most fabricators can draw from experiences gained through a wide variety of technologies they have worked with through a large customer base. This also holds true about your assemblers. What are their capabilities and what are the costs associated with different technologies? What rules should the design follow in order to reduce cost and/or improve reliability? Are there panel, or component size limitations? Don't forget their testing capabilities and any specific limitations that should be reflected in the design. In other words, there is much to be gained by communicating with your suppliers. Obtain your fabricator's error rule files (ERF). This will enable you to check them against your rules to make sure that you are both on the same page. Use industry standards when available. They are there to guide you as to how far you can push a design before negatively affecting fabrication, assembly, test, field service, and most important reliability. Shaughnessy: On the other hand, what are the most common mistakes that designers make that can slow things down during fabrication? I've heard of some CAM departments that stay busy with design data errors, especially from new cus- tomers. Ferrari: This is one area that really gets me go- ing. I have spoken with customers that want to renegotiate a contract and cut costs by 30%. I tell them that we can do that by manufactur- ing the product on a larger panel with more boards produced per panel, resulting in a lower per-board cost. Unfortunately, we cannot do this with the existing board design, since the annular rings do not allow sufficient process al- lowances for registration, etch factors, material movement, etc. In many cases we are fighting for only a 0.001" additional annular ring. What is frustrating is that the fix is free! All the designer needed to do was increase his padstack annular ring by 0.001" or more. Once the pad stack has been approved and placed into the system library, every time the padstack is used it will automatically meet fabrication requirements for a larger fabrica- tion panel size. The designer will never notice that the lands are larger and will, in most cas- es, complete a design without being affected by the increase. Insufficient annular ring is the number one hit that fabricators see. They spend a lot of time attempting to salvage a design by manually in- creasing annular rings, and moving adjacent conductors to maintain a minimum spacing re- quirement. Depending on the density and size of the board, this could be a monumental and costly operation. IN DEEP: THE ART AND SCIENCE OF DFM WITH GARY FERRARI