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32 The PCB Design Magazine • February 2017 I originally came up with the concept of an online impedance calculator way back in 1994 when I was working on the PCB layout and design for a new generation of SPARC 20 serv- ers. We basically reformatted a Sun SPARC 20 pizza box motherboard to fit into a 5.25-inch drive slot. This was of course a tight exercise, but my idea was this: If I could physically fit all the required chips and connectors on the board, then it could be routed. This design re- quired a 12-layer motherboard, and I used the IPC-317 "Design Guidelines for Electronic Pack- aging Utilizing High Speed Techniques" closed- loop equations to determine the signal layer impedance. The maximum CPU frequency was 200MHz, so there was plenty of margin. To cut a long story short, after months of development, the project was completed and launched into the market. In 1995, the devel- opment team received an IEEE Engineering Ex- cellence Award for the design. The server was subsequently licensed to a US company, jointly owned by Fujitsu and Sun Microsystems. Under license, the manufactured machine, a US-built SparcPlug Station, won the Best Performance category in the 1997 US AIM "Hot Iron" Awards. During the development phase, as with all complex equations, I kept getting different re- sults each time I manually calculated the im- pedance of a signal layer. Realizing that other designers have a similar problem, and a need to control the impedance of high-speed designs, we decided to write the code for an online im - pedance calculator based on the closed loop equations to simplify the process. This was first launched in 1995 and has developed, from its humble beginnings, into the iCD Stackup Plan- ner, which today has very accurate field solv- er technology. Since then, we have had over 15,000 registered users globally. Of course, the product today has matured and is quite differ- ent from the original online tool, but our phi- losophy remains the same: a focus on simula- tion speed, ease of use and accuracy at an af- fordable price. We have created a centralized, shared, im- pedance planning environment that connects materials, PDN analysis, stackup planning, sig- nal integrity, PCB design and fabrication, con- solidating the impedance control from sche- matic to fabrication. The impedance is planned pre-layout and flows through the design process to fabrication–achieving right first time design. Bi-directional Interfaces were developed for the most commonly used EDA tools: Allegro, Altium Designer, HyperLynx, OrCAD, PADS, and more recently the new IPC-2581B format. The IPC-2581B format interface has now been thoroughly tested by the IPC-2581 Consortium. This new feature gives the iCD Stackup Plan- ner the ability to import/export Cadence Alle- gro and OrCAD stackups and to import Altium Designer, PADS Pro, Xpedition and Zuken CR- 8000 stackups. This allows the designer to either extract the stackup from their layout tool into the Stackup Planner or create a new stackup from scratch. Materials can then be inserted from the 30,700 available rigid and flex materials to greatly in- crease the accuracy of impedance, allowing for multiple differential pair technologies on the one substrate. The completed stackup is then ex- ported back to the layout tool and design rules are automatically created to match the routing requirements. An Excel fabrication drawing can also be automatically created to inform the fab- ricator of the stackup and materials required single ended, edge and broadside coupled dif- ferential pairs and microvia spans. The iCD Design Integrity suite of tools in- corporates both the Stackup and PDN Planner, plus a myriad of new functionality specifically NEW FUNCTIONALITY IMPROVES DESIGNER'S PRODUCTIVITY " We have created a centralized, shared, impedance planning envi- ronment that connects materials, PDN analysis, stackup planning, signal integrity, PCB design and fabrication, consolidating the impedance control from schematic to fabrication. "

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