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36 The PCB Design Magazine • February 2017 NEW FUNCTIONALITY IMPROVES DESIGNER'S PRODUCTIVITY Planner allows you to not only match the length of busses, but to take this one step further by au- tomatically calculating the appropriate length required to match the delay exactly. The inte- grated field solver simulates the flight time, of each signal layer, to quickly give you the results you need to effectively route memory. The relative signal propagation, of each sig - nal layer, is displayed as a bar graph, once the matched length has been set (Figure 2). Select- ing Matched Delay automatically optimizes the length, of each signal layer, to match the maxi- mum delay. The users can then route the data lane to the exact delay, in their preferred design tool. Also, it is one thing to perfectly match the delay of the transmission lines. But unfortu- nately, when using mainstream PCB layout software, one really has no idea what the driver impedance is, let alone the capability to match the driver to the impedance of the transmission line. The iCD Termination Planner addresses this issue. Firstly, the attributes required to determine the source impedance of the driver, are extract- ed from an IBIS model IV curves. Then the re- quired series termination resistance is calculat- ed, based on a distributed system, to match the transmission line for the selected layer in the iCD Stackup Planner. If the IBIS model is not available (or produces an error) the user may use Generic Models to calculate an approximate se- ries termination. Generic models include: typi- cal DDRx, Display Port, ECL, HDMI, LVCMOS and LVTTL gates, Mini-LVDS, NAND Flash, PCI, SDRAM, HSTL and SSTL models. The number of loads on the transmission line also has an effect on the required value of series termination; as the IC input inductance and capacitance tend to roll-off the signal rise time. This can be adjusted from 1–6 loads and automatically compensated for in the calcula- tion. Benefitting from 22 years of customer feed- back and product development, the iCD De- sign Integrity software now provides numerous productivity tools for the high-speed PCB de- signer. The software was designed and built by PCB designers, specifically for PCB designers. We know what you need and what you want as we also do many real-world PCB designs and simulations ourselves. The tools are easy to use Figure 3: Matching a DDR3 driver IC to the transmission line.