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86 The PCB Magazine • August 2017 Interconnect stress testing (IST) was also carried out to further characterize the deposit. IST testing is an accelerated test method used to evaluate the integrity of interconnects and plated through-holes. This method utilizes elec- trical currents passed through a circuit in the board at sufficient resistance to increase tem- perature. Coupons were run through assembly simulation called preconditioning prior to cy- cling. Coupons were tested prior to precondi- tioning for continuity. Figure 8 shows the as- sembly of through-holes in an IST coupon and the electrical continuity. A coupon was sacrificed to determine the current needed for preconditioning. All cou- pons were preconditioned six times to 260°C prior to cycling at 150°C to 500 cycles or to fail- ure. After preconditioning, baseline resistance readings were established and the temperature cycling was started. Each thermal cycle con- sists of passing sufficient current through the internal power circuit to elevate the tempera- ture to 150°C, then subsequent cooling down to ambient temperature. During the temper- ature cycling, resistance is monitored on the power circuit and the sense circuit. If the re- HIGH-THROW DC ACID COPPER FORMULATION FOR VERTICAL CONTINUOUS ELECTROPLATING PROCESSES Figure 7: 6X thermal shock test. Figure 8: Assembly of through-holes in an IST coupon. Power is shown in gold and the sense is in blue.