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40 The PCB Design Magazine • September 2017 duced. If an error is missed and a manufactur- ing partner finds it, you have lost valuable time and must go back and fix a problem after the designer has moved on to another design. The second major problem with the current approach is that problems are found after the design is completed. At that point, it takes much longer to fix a simple problem since many other objects—traces, pins, components, shapes—are impacted by an otherwise simple fix. Some of the top issues that PCB fabricators report can be caught early in the design process with the right manufacturing rules in place. The Copper-to-board outline is still a top 10 issue . A common challenge comes when the mechanical engineer defines a cutout in the de- sign. A mechanical designer who may not have full knowledge of manufacturing rules often sets the keep-out too small. The PCB designer, trusting the mechanical data, wraps up the de- sign and sends it for signoff. Unknown to the PCB designer, the mechani- cal keep-out allows for a 4-mil clearance, but the PCB fabricator requires 10 mils. When signoff receives the PCB design, they detect and report the violation back to the PCB designer, several Figure 1: Current new product development and introduction (NPDI) process. Figure 2: Connector pins are too close to the cutout in the board. Fixing this error after the design is completed —moving traces and other components after they are routed—is too expensive. AN OUNCE OF DFM ERROR PREVENTION IS WORTH A POUND OF CURE

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