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26 The PCB Design Magazine • October 2017 As Dave Dunham of Molex Corp. likes to say, "When designing high-speed serial links beyond 10 GB/s, everything matters." And part of that everything is accurate modeling of trans- mission line losses. Failure to account for conductor roughness can ruin you day especially if you are trying to push 28 GBaud/s (56 GB/s) PAM-4 signaling down your channel. As shown in Figure 1, with just 1.4 dB delta in insertion loss, at 14 GHz Ny- quist frequency, results in an average reduction of 38% in eye height, and 4.3% increased jitter across all three eyes, when conductor roughness is taken into account. On top of that, failure to correct dielectric constant (D k ) from manufac- turers' data sheets due to conductor roughness can lead to inaccuracy in phase delay [1] . To ensure first time success at these speeds, using the right parameters for dielectric and conductor roughness to feed into modern EDA tools is a prerequisite. This is especially true for long backplane channels. Many EDA tools include the latest and great- est models for conductor surface roughness and wide-band dielectric properties. But obtaining the right parameters to feed the models is al- ways a challenge. So how do we get these pa- rameters? One way is to follow the design feedback method which involves designing, building and measuring a test coupon. After model- ing and tuning various parameters to best fit measured data, D k , D f and roughness param- eters can be extracted. They are then used in by Bert Simonovich LAMSIM ENTERPRISES Practical Modeling of High-Speed Backplane Channels FEATURE COLUMN: BERT'S PRACTICAL DESIGN NOTES Figure 1: Simulated results of a differential transmission line with and without conductor roughness taken into account. With just 1.4 dB delta in insertion loss, as shown on the left, results in an average reduction of 38% in eye height and increase of 4.3% in jitter across all three eyes, as shown on the right.