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64 SMT Magazine • November 2017 as the bulk solder "tears" or separates from the IMC. This solder separation can occur at ei- ther the package interface or the PCB interface of the solder joint, depending on whichever is the weaker interface. Since the PCB pad de- sign is generally a non-soldermask-defined pad (NSMD) and the BGA package typically uses soldermask-defined pads (SMD), the separation will more likely occur at the package interface. Alternatively, a 100% VIPPO BGA footprint without deep backdrill does not introduce the additional stresses that are exhibited with the CTE mismatch between adjacent VIPPO and non-VIPPO pad designs. Additionally, a 100% VIPPO BGA footprint without deep backdrill does not create the high thermal gradients be- tween adjacent solder joints that the mixed VIP- PO/non-VIPPO BGA footprints achieve. There- fore, this type of failure mode has not been identified with 100% VIPPO BGA footprints with no deep backdrill. Evaluation Plan In order to better understand the influence of various PCB and packaging design param- eters on this failure mode, three different test vehicles have been designed to assess the fol- lowing: 1. Influence of drill hole size (DHS) for the VIPPO structures: 9.8 mils vs. 7.9 mils DHS 2. Influence of BGA package body size and BGA pitch 3. Influence of varying backdrill (BD) depths and BGA package body size Each test vehicle is assembled through a pri- mary and secondary SMT attach process, fol- lowed by inspection and physical analysis to validate the solder joint integrity after each reflow. The printed circuit assembly equipment, process parameters, tooling (e.g., stencil de- sign and technology), assembly materials (e.g., solder paste) and inspection equipment and methodologies utilized for these builds are consistent with Cisco's standard production processes in order to minimize the number of variables introduced in this study. Test Vehicles The DDR4 VIPPO and non-VIPPO test vehi- cle (shown in Figure 9) is designed to investi- gate the influence of two different VIPPO drill hole sizes (DHS), 9.8 mils & 7.9 mils, on the sol- der joint integrity in a mixed VIPPO and non- VIPPO BGA footprint within the PCB. A set of controlled PCB factors such as PCB thickness (125 mils), material (Megtron 6) and number of stack-up layers (16) are used along with DDR4 daisy chain BGA components (13.3x7.5 mm sq., 0.8 mm pitch) for resistance measurement and failure analysis purposes. The DDR4 com- ponents are designed only for single-side PCB assembly. However, for this evaluation, the as- sembled PCB is subjected to a second SMT re- flow excursion in order to simulate a secondary topside reflow process. The fine pitch VIPPO and non-VIPPO test VIA-IN-PAD PLATED OVER DESIGN CONSIDERATIONS Figure 7: CTE mismatch between VIPPO and adjacent non-VIPPO structures. Figure 8: Thermal gradient between VIPPO and non-VIPPO structures.