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18 The PCB Magazine • November 2017 In 1995, I was involved with helping Hewlett-Packard's Laboratory in Palo Alto de- velop exploratory software for PCB design and DFM. Their first creation was a software tool called the Board Construction Advisor (BCA) (Figure 4). From a paper the creators wrote for an internal HP design technology conference in 1990, they described the tool as "… to help specify the detailed physical design after sche- matic capture and component selection have been completed ...to answer questions about the cost and [mfg.] yield implications of design alternatives, the electrical characteristics of ma- terials and geometry choices, and the availabili- ty of features at manufacturing sites." The soft- ware worked perfectly; I loved the ease at which designs could be optimized. But one problem came to the surface. It could quickly give an- swers and create graphs and figures about a pro- posed PC board, but what if you did not know the questions? Tested on most engineers and novice PC designers, they kept asking, "What questions do I ask it now?" So the lab went back to work and created Explorer. Explorer was a totally new approach to op- timizing a PCB design. It was a self-learning, ar- tificial intelligence that had an expert system as its engine. The inputs were specifications of de- sign tasks directly in terms of constraints and goals, the schematic and parts library. The soft- ware would automatically search for and gener- ate realizable physical designs and judge them against the constraints and goals. It would then use its interactive multi-criteria, multi-objective optimization and trade-off algorithms to create a different and hopefully better design. After nearly 250,000 different designs it would signal that it had finished and would dis- play the top 25 designs against the goals and constraints given it. The results were stunning. You had only to decide about what was impor- tant for the trade-offs. How important is it to have the lowest board manufacturing and as- sembly costs versus all the signal integrity goals Figure 4: Results of multiple design runs with HP Lab's BCA + Explorer. 35 YEARS OF HDI FABRICATION PROCESSES AND OBSTACLES FOR IMPLEMENTATION