Issue link: https://iconnect007.uberflip.com/i/899995
November 2017 • The PCB Design Magazine 15 THE HDI ROUNDTABLE EXPERTS DISCUSSION substrate. You just ended up with a lot of holes in the board because you didn't use those vias and they got etched away. Bird: Got it. Now, what we're doing is we're sending our blind via drill chart to the FCCL (flex copper clad laminate) provider so they're customized. By the time they get over to the fab shop, our blind vias are pre-drilled and pre- seeded, including the via barrels. So, it's not the only path that we're taking. We're scouring the Earth for inorganic solutions as well. We're look- ing everywhere we can to stay competitive and our mantra here is that we have to explore every path, because if we don't our competitors will. We're just now starting to explore the pre- drilled and pre-seeded layer idea. We're actually right in the middle of looking at particular fab shops saying, "Is there a traveler that you could put together that would yield these types of trace, space and via features?" Stephen Las Marias: Tony, what HDI challenges is APCT facing right now? Tony Torres: My title is director of marketing, so I'm not going to pretend that I'm an engineer. But what I can tell you is that, when this design goes to our DFM team, besides looking at lines and spaces, annular ring and hole to copper, one important issue that we review is the materials to be used. I was very interested in listening to the discussion on what's coming. The first thing that we must do to satisfy customer needs is to come through with quality and high-reliability product. We give a lot of feedback about what materials to use. We would be very, very open in that conversation. Happy Holden: Sounds like RF in the digital en- vironment. Bird: That's exactly what it is. It's a mix of RF- and IC-level packaging. We've become a pack- aging company. If you really think about what we're doing, we're reinventing our schematic into smaller and smaller packages with each generation, because we know that's the only way that the speed is going to scale. So, yes, ex- actly that. We're at the point with a coplanar waveguide that you either use all of it, from end to end, or you use none of it. Because if you terminate a coplanar waveguide early, it will show up in the sims and in the EMI behavior, it will also show up in the bit error rate tests. So, we can discern a 50-micron movement in a via, in terms of the return path. We're revising our boards just based on pad shaving, artwork shaving. No net list changes; we're just shaving the artwork. Barry Matties: You mentioned that you're on a material search. Have there been any surprises in that search? Bird: Yes, we've had a couple of surprises. First, the first generation was well at hand. If we don't do a lot of chip mount on PCB, then a lot of the polyimides would work for as long as we keep them on the top or bottom layers. But in the semi-additive process and the additive process, there are a couple of materials that are starting to show up as promising, which is probably the best way to say it. We're working out a deal where one of the suppliers is actually looking at pre-drilling the blind vias and pre-seeding the FCCL, so that we can use a fab house that would normally do just the subtractive process and get them into semi-additive without a lot of work. Holden: Sounds like shades of via ply, where the polyimide was prebuilt with 1 mil holes and then vacuum-metalized and then plated up to 5 microns thick. Bird: That's exactly the region we're in. Holden: You didn't have to drill or metallize any holes because the via holes were already in the " The first thing that we must do to satisfy customer needs is to come through with quality and high-reliability product. "