Design007 Magazine

PCBD-Nov2017

Issue link: https://iconnect007.uberflip.com/i/899995

Contents of this Issue

Navigation

Page 30 of 87

November 2017 • The PCB Design Magazine 31 must all work together to provide a low imped- ance between power and ground across the en- tire frequency range. One factor that limits the effectiveness of the board capacitances is the inductance of the chip package. This additional inductance adds to the parasitics of the board capacitances, mak- ing them ineffective above about 1GHz. Above 1GHz, the on-chip capacitance (not limited by the inductance of the package) provides the low impedance path between power and ground. As such, board decoupling is typically analyzed between about 1MHz and 1GHz, and board PDN design is focused at minimizing the impedance between those frequencies. To make capacitors effective over the larg- est frequency range possible, the largest ca- pacitance value possible for a given parasitic inductance is the ultimate goal. Parasitics for ule (VRM) supplying volt- age to the rail, the decou- pling capacitors tied be- tween power and ground, the planes and/or traces carrying power, on-chip decoupling, and the pins and vias connecting all these elements together. The VRM is very ef- fective in providing a low impedance path be- tween power and ground up to around 1MHz. For the remainder of fre- quencies, the low imped- ance between power and ground must be provid- ed by the board and chip capacitances. The board and chip capacitances combine in parallel, but are each limited in effec - tiveness by their parasit- ic inductances and resis- tances. Without parasitics, all the capacitances would combine to make one large capacitance, which would equate to a lower impedance with increasing frequency. Unfor- tunately, each capacitance is only effective in a given frequency range, as determined by its parasitic inductance. For instance, very large electrolytic capacitors reach a low impedance at a lower frequency than smaller surface mount- ed capacitors, but because their parasitic induc- tance is also larger, their impedance will also start to rise at a lower frequency. Another example is the inherent capacitance between planes on the board. The parasitic in- ductance of the planes is extremely low, mak- ing it an effective capacitance even at higher frequencies. Because the amount of capacitance between planes is typically limited by their area and spacing, the plane capacitance does not equate to a low impedance until higher frequen- cies. As such, each of the board capacitances is only effective for a certain frequency range, and THE IMPACT OF HDI ON PCB POWER DISTRIBUTION Figure 2: Cross-section illustrations of common HDI layer stack-ups.

Articles in this issue

Archives of this issue

view archives of Design007 Magazine - PCBD-Nov2017