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52 The PCB Design Magazine • November 2017 of electronic performance and efficiency. It is widely used in mobile phones as well as digital cameras, notebook computers, automotive elec- tronics and more. There is market demand for HDI in both domestic and overseas markets. Shaughnessy: What are the biggest challenges you face with your HDI designs? Wu: The small board size, more functional modules, and packaging miniaturization (0.35 - 0.5 mm BGA) all cause a design bottleneck. As a result, smaller line widths (<3 mils) and multi- level HDI designs need to be used. The design of multi-stage HDI boards re- quires a flexible, powerful constraint manager that recognizes both microvia and common mechanical holes and sets the spacing con- straint between microvia and other elements. The constraints of the network become compli- cated, and need to support the check of the net- work spacing constraints in various situations. To help the design engineers manage projects, we require the ability to clearly display different types of vias. With Cadence's design tools' HDI design and processing capabilities, EDADOC's PCB de- signers have completed countless high-density miniaturization product designs. Figure 1 de- picts one such design, a three-stage HDI board. The density, design of the minimum line width and spacing of 2.4 mils challenged the indus- try's limits. EDADOC also helped this customer with the board fabrication and assembly. EDADOC DISCUSSES HDI DESIGN AND MANUFACTURING Figure 1: A three-stage HDI board design.