Issue link: https://iconnect007.uberflip.com/i/916068
26 The PCB Design Magazine • December 2017 Second, all this stuff is too complicated to analyze with graphs or equations. Our industry has been here before. In the early '90s, many designers began to worry about and deal with controlled impedance traces. Back then, we used equations published in documents from IPC, Motorola, and National Semiconductor. Today, we now know that those equations are not adequate, and we need field-effect solutions for calculating trace impedance. The same thing is happening for trace current/temperature rela- tionships. If we want to optimize our designs, we need to use thermal simulation tools. Shaughnessy: What's your next project regard- ing thermal management? Brooks: Right after I gave a presentation on this topic in Tel Aviv last May, I was approached by Mentor's Nitin Bhagwath, who was really think- ing outside the box. As we talked, we realized that there are two design paradigms board de- signers need to understand: The first is how to move the signal (current) from point A to point B. As rise times get faster, we have to start deal- ing with various signal integrity issues. As an industry, we already have a good understanding of how to do this. The second is how to move the power from one place to another. This is quite different from moving a signal. As the cur- rent increases, the I 2 R drop increases, increasing the trace temperature (heating the trace). We need to manage this heat buildup and dissipate it some way. Currently, our primary answer is to increase the trace size, usually using the data in IPC 2152. But Nitin pointed out that there are other, perhaps many other, tricks we can use to manage the heat dissipation without impacting signal integrity. Many of these tricks employ the addition of non-current carrying areas of copper along the trace to increase the surface area, where we can, and ways to reduce the area in places where there is a high density of in- terconnects. Nitin will be presenting a paper on this with numerous examples at DesignCon in January. I have co-authored that paper with him, along with five other people [6] . I am ex- cited about this new insight. Shaughnessy: What's next for Doug Brooks? Didn't you say you were going to retire? Brooks: I have been threatening retirement for about four years now. The time has finally come. My wife and I have just downsized into a condo near Seattle, and I am spending my time watching sports on a huge TV and playing with our seven grandchildren. Shaughnessy: And writing articles for us! Thanks for talking with me, Doug. Brooks: Thank you. PCBDESIGN References 1. TRM (Thermal Risk Management) was originally conceived and designed to analyze temperatures across a circuit board, taking into consideration the complete trace layout with optional Joule heating as well as various components and their own contributions to heat generation. You can learn more about it by clicking here. 2. IPC-2152, "Standard for Determining Cur- rent Carrying Capacity in Printed Board Design," August 2009 3. This first article, "Fusing Current: When Traces Melt Without a Trace," was published in Printed Circuit Design, (Miller Freeman), in December 1998. It has been withdrawn from the UltraCAD website because of the new informa- tion we have discovered in this research. 4. Douglas G. Brooks and Johannes Adam, PCB Trace and Via Temperatures: The Complete Analysis, 2nd Edition, 2017, available at Amazon.com. 5. IPC-2152, op. cit., page 26. 6. The other co-authors are Robin Bornoff, Praveen Anmoula, and Pat Carrier (Mentor Graph- ics), Joseph Aday (Raytheon), and Robert Carter (Oak-Mitsui). THERMAL MANAGEMENT UPDATE WITH DOUG BROOKS " If we want to optimize our designs, we need to use thermal simulation tools. "