Issue link: https://iconnect007.uberflip.com/i/929192
JANUARY 2018 I DESIGN007 MAGAZINE 37 of the design, not the schematic. Given that 78% of all projects experience two or more respins, and that the root cause for many of the respins can be traced back to schematic design errors, the time has come for fully automated sche- matic verification. Eliminating schematic errors can result in significant cost- and time-savings, resulting in faster time-to-market, improved product quality, and lower risk (Figure 3). By fully automating schematic verification to occur during schematic capture, rather than after, the development process shifts to the left, resulting in proven benefits such as reduced cycle time, lower costs, and the elimination of design spins (Figure 4). Using Xpedition schematic integrity analy- sis, engineers can fully inspect all nets on a schematic using pre-defined checks and an extensive intelligent model component library. This automated schematic analysis can save design teams hundreds of hours of visual inspection and lab debug time. The checks Schema c Review Re-spin Layout Review Re-spin NPI Lab prototype Re-spin Volume mfg. Schema c Layout Signoff NPI Volume mfg. Schema c SI / PI Thermal Vibra on DFM Integrity Conven onal design process Longer cycle me through manual inspec on, incomplete coverage, and reliability issues leads to addi onal re-spins Xpedi on le -shi solu on Early, integrated valida on reduces cycle mes and increases quality Le -shi Technology Cycle me reduc on Cost reduc on Elimina on of design spins Figure 3: Benefits from fewer schematic errors. Figure 4: Left-shift of schematic technology.