Issue link: https://iconnect007.uberflip.com/i/948150
46 SMT007 MAGAZINE I MARCH 2018 line highlights the 70% paste transfer effi- ciency threshold which is a common transfer efficiency target for standard printing applica- tions. The data is quite distinctively divided above and below this threshold, with the all the 50mm thick step stencil apertures perform- ing at or above 100% average TE and all the full 80mm thick stencil apertures perform- ing at or below 70% average TE. This divided pattern supports area ratio logic. Further interrogation of the data shows the bare Cu printed boards to yield lower paste transfer than the NSMD Cu pads in 3 of 4 instances. The PCB topography introduced by solder mask openings and patterned metal- lization leads to improper stencil gasketing during the aperture fill process, likely allowing the additional paste volume to be deposited. For both LG and SM Cu pads, the nano-coated stencil results in overall solder paste trans- fer efficiency improvement compared to the un-coated stencil. The only condition where stencil nano-coating has a negative influence on average paste transfer is for the full 80mm thick stencil apertures printed on bare Cu. Reference [10] also reports average volume paste transfer efficiency data where the nano-coated stencil produces less paste volume (compared to an un-coated stencil). It is explained in [10] that the nano-coating assists to improve the shape of the print deposits to more closely resemble the true form of the stencil aperture. In contrast, the un-coated stencil may produce printed deposits that exhibit some shape distor- tion that contributes to inflated transfer effi- ciency values. While the logic for improved solder paste deposit shape ascribed to a stencil nano-coat- ing seems reasonable, this does not make complete sense upon considering the standard deviation data. The same 80mm thick sten- cil aperture print results on bare Cu boards exhibits a contradicting trend as shown in the standard deviation interaction plot of Figure 14. The values in Table 7 report the specific data plotted. An improved solder print deposit shape should also correlate to better unifor- mity marked by reduced standard deviation value, which in fact has not occurred for the nano-coated stencil result. Our explanation for this reduced printing capability is the discov- ery of a unique set of conditions for which the function of a stencil nano-coating hinders printing performance. Such conditions are now thought to consist of a stencil nano-coat- ing in combination with challenging aperture area ratio designs while printing onto a flat surface where the stencil gasket condition is ideal. Additional validation testing is required to grow confidence in this fresh hypothesis. Table 6: M0201 mean paste volume data. Figure 13: M0201 mean paste volume trends.