Issue link: https://iconnect007.uberflip.com/i/981887
62 DESIGN007 MAGAZINE I MAY 2018 the board designer and the board fabricator can be invaluable. For example, a customer may ask me questions like these: "Mark, what is the smallest mechanical hole size you can do?" Or "What is the thinnest dielectric you can deal with?" Or, "What is the minimum sol- der mask clearance you need?" All are perfect examples of questions that, depending on the customers' intentions, and they can be answered in multiple ways. The first question, asking about minimum mechan- ical hole size, is usually fol- lowed by "What is the small- est signal pad associated with that hole size and what is the smallest anti-pad on a plane layer for that hole size?" This is where the fabricator should be asking more questions, such as, "Are you referring to vias when you ask about our small- est hole size?" Because you can buy your- self back a lot of real estate for trace routing, smaller pad sizes and smaller anti-pad sizes by your tolerance callout. If you call them out as +/-.003" we must drill some .004-.005" mils larger than the nominal hole size to plate back down to the nominal. If all you want is electrical conti- nuity and don't really care how small a given via ends up, call it out as +.003" minus the entire hole size. This tells a fab shop that they can drill the hole smaller, which makes my answers about minimum pad and minimum anti-pad size more appealing. They can now be smaller. The same holds true with the second ques- tion. I need more information on my part to adequately answer this question. Sure, I can tell you we can use .0025" core internally for capacitance and decoupling, but can we have .0025" pre-preg dielectric between 1 oz. clad cores? No! And that is where my conversation changes to copper aspect ratios and pre-preg nesting or loss due to the layer type. Is it full plane, where it may not lose a lot of dielectric distance, or a signal where it may lose some dielectric? Let's talk about the third question regard- ing minimum solder mask web. If you ask me what solder mask clearance we prefer for a given pad or SMT, we will tell you about .003" per side or .006" total over the signal pad size. But you have to understand that this is not always feasible, depending on board geome- try! That is where we can talk about less clear- ance to be able to maintain the minimum web size between mounts. Beyond any tolerance or capability questions, your board fabricator has empirical data to support the Dk numbers that they use to meet a customer's given impedances. Many times, we are at least a decimal point past what the material manu- facturer says, all in an effort to get the customer what they want. There are a lot more reasons a designer may want to talk with a fabricator, but it really boils down to that first statement. Our customers, the designers, need to understand fabrication needs. And we as fabricators need to know their needs. Beaulieu: Sounds like there are a lot of reasons for a board designer to speak with a board fab- ricator. Thompson: Absolutely. Beaulieu: Changing gears a little, what are some things that can make the price of boards go up un-necessarily? Thompson: That's a good one! There are a num- ber of things that can make the price of a part go up. I guess it really comes down to how close the customer wants to get to the final- ized product with a prototype. Is the build for part fit/assembly, or functionality, or both? If it's only for part placement and fit, they may decide to build the part on a material much less costly than the one they will end up with in the final product. They may even choose not to have an image, mask, or ID depending on Mark Thompson