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26 DESIGN007 MAGAZINE I MAY 2018 roughness effect on a microstrip channel eight inches in length. At 14GHz, 0.3um roughness introduces an additional 0.5dB, while 1.8 um roughness adding an extra 2.5dB attenuation versus a totally smooth copper surface. Hence, hardware developer shall choose the PCB fab houses that offer copper foil type with surface roughness 0.3 um or less to mitigate the attenu- ation and distortion of the signal transmission. D. Minimizing via stub Blind or back-drilled vias (Figure 6) shall be applied for IC pin break out on PCB to min- imize the stub length, which in turn pushes the quarter wave resonant frequency higher, thereby increasing the bandwidth of the physical channel. With reference to Equa- tion 4 [12] , the quarter wave resonant frequency is inversely proportional to the stub length. Rearranging Equations 4 and 5 [13] , for 56Gbps (i.e., 28GBaud) PAM-4 transmission on PCB with low-loss material, where Dkeff is 3.45, the maximum stub length would be ~11 mils. (Equation 4) (Equation 5) Where: f o = quarter wave resonant frequency (Hz) c = speed of light (~12 inches/nano-second) stub_length in inches D keff = effective dielectric constant E. Minimizing impedance mismatch due to mounting pad of AC coupling capacitor The mounting pad of the AC coupling capac- itor has wider copper versus the PCB trace. For example, the capacitor in a 0201 package has 10 mil pad width, while 0603 package has 30 mil pad width [14] , while PCB microstrip trace width is normally set not more than 10 mils. Referring to Equation 6 and 7 respectively [15] , a wider copper in mounting pad versus PCB trace increases the capacitance, which in turn causes capacitive discontinuity or mismatch to the characteristic impedance of the transmis- sion line in single ended mode. Figure 7 depicts the simulated plots of dif- ferential insertion loss for microstrip traces (i.e., 500 mil long and 6 mil wide in single- ended mode) interface with capacitor in 0201, 0402 and 0603 package respectively. A wider mounting pad contributes to a larger imped- ance discontinuity, which in turn causes a larger insertion loss due to more severe signal reflection. The attenuation at 14GHz due to 0603 (i.e., 1.2dB) and 0402 (i.e., 0.4dB) pack- ages are at least double of 0201 (i.e., 0.2dB). Hence, designers should use capacitors in a Figure 5: Simulated plot of differential insertion loss for copper surface roughness effect with Hyperlynx. Figure 6: Blind or back-drilled via.