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Design007-Sept2019

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58 DESIGN007 MAGAZINE I SEPTEMBER 2019 needing grounding being routed directly to the ground plane on another layer. However, this is a simplistic approach. One should also consider the presence and interaction of the power distribution network (PDN) and how and where the return current flows. A logic schematic diagram masks details crucial to the operation of unintentional signal pathways vital to your understanding of signal perfor- mance, crosstalk, and electromagnetic emis- sions. When you plan your stackup, be aware of which plane(s)—either power or ground)— will be the return path for your critical signals, and ensure there is an unobstructed return path. The best way to think of this is to imag- ine routing a return trace adjacent to each sig- nal trace on the reference plane. Where will the current flow, and is it unobstructed? The reference plane adjacent to each signal layer allows the return current to flow as closely as possible to the signal trace reducing induc- tance and loop area. 9. PDN and Capacitor Selection, Parts 1 and 2 This two-part column focused on capacitor selection and three alternative approaches to analyzing the PDN: 1. Target frequency 2. One-value capacitor per decade 3. Optimized value capacitor The target frequency approach has been tra- ditionally used. This method targets a precise frequency and is used to reduce AC impedance as well as EMI within a specific band. The alter- natives of using either a one-value capacitor per decade or many optimized capacitors are used in an attempt to level out the AC imped- ance at the desired impedance over a broad frequency band (Figure 1). 8. Signal Integrity, Parts 1–3 As system performance increases, the PCB designer's challenges become more complex. The impact of lower core voltages, high fre- quencies, and faster edge rates has forced us into the high-speed digital domain. But in real- ity, these issues can be overcome by experi- ence and good design techniques. If you don't currently have the experience, then listen up. This three-part series on signal integrity cov- ered the following topics: • How advanced IC fabrication techniques have created havoc with signal quality and radiated emissions • The effects of crosstalk, timing, and skew on signal integrity • Where most designer's go wrong with signal integrity, and how to avoid the common pitfalls 7. Plane Crazy, Parts 1 and 2 A high-speed digital PDN must provide a Figure 1: Target frequency vs. optimized value approaches (iCD PDN Planner).

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