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24 The PCB Design Magazine • October 2014 by Barry Olney In-CIrCuIT DESIGn PTY LTD BEYOND DESIGN Signal Integrity, Part 1 of 3 feature column As system performance increases, the PCB designer's challenges become more complex. The impact of lower core voltages, high fre- quencies and faster edge rates has forced us into the high-speed digital domain. But in reality, these issues can be overcome by experience and good design techniques. If you don't currently have the experience, then listen-up. This three- part series on signal integrity will cover the fol- lowing topics: 1. How advanced IC fabrication techniques have created havoc with signal quality and radiated emissions. 2. The effects of crosstalk, timing and skew on signal integrity. 3. Where most designers go wrong with signal integrity and how to avoid the common pitfalls. Technology is moving fast and much has changed over the past 25 years that I have been involved in high-speed multilayer PCB design. Particularly, advances in lithography enable IC manufacturers to ship smaller and smaller dies on chips. In 1987, we thought that 0.5 micron technology was the ultimate, but today 22 nm technology is common. Also, power consumption in FPGAs has become a primary factor for FPGA selection. Whether the concern is absolute power con- sumption, usable performance, battery life, thermal challenges, or reliability, power con- sumption is at the center of it all. In order to reduce power consumption, IC manufacturers have moved to lower core voltages and higher operating frequencies, which of course mean faster edge rates. However, faster edge rates mean reflections and signal quality problems. So even when the package has not changed and your clock speed has not changed, a problem may exist for legacy designs. The enhancements in driver edge rates have a significant impact on signal quality, timing, crosstalk, and EMC. Figure 1 illustrates the change in edge rates over the years, from 10ns back in 1985 to less than 1ns in 2010. The faster edge rate for the same frequency and same length trace creates ringing in the un-terminated transmission line. This also has a direct impact on radiated emis- sions. Figure 2 shows the massive increase in emissions from the slowest to fastest rise time. When dealing with 1ns rise times, the emissions can easily exceed the FCC/CISPR Class B limits for an un-terminated transmission line. At high frequencies, a trace on a PCB acts

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