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56 The PCB Magazine • October 2017 tion coming off the board from 1 to 7 GHz. The FCC requires testing to five-times clock frequen- cy. Thinner dielectrics result in lower EMI. The higher D k material (in this case D k of 10 com- pared to 4.4 for the other material) had the low- est EMI on average, but did shift the EMI distri- bution. This improvement in EMI was shown by Sun Microsystems in one of their server de- sign case study. Case Study of Cost, Size, Thickness and Design Time Reduction The board illustrated in Figures 9a, 9b, and 9c not only benefited from SI improvement, but the HDI microvia version was 43% less expen - sive and took 30% less time to design than the through-hole version. The original board was 11.75" x 8.75", included 18 layers, and was all through-hole. The upgraded, high-speed ver - sion used two new BGAs, each with 676 pins at a 1.00 mm pitch. A microvia change was indi- cated. After analysis with pre-design software, the HDI version could be designed with only six signal layers for a total of 10 layers. Figures 14a and 14b show the finished design. Utilizing all via-in-SMT pad design and surface ground planes with buried vias, the board was reduced by 35% to 9.2" x 6.3". The before and after char - acteristics of the two designs are detailed in Figure 15. Conclusion Blame it on Maxwell's equations, but SI is getting more important and… more difficult. HDI provides small geometries and dielectrics. Providing you take advantage of the other ben- efits of HDI, like lower costs and higher densi- ties, SI will benefit as well. All of the problems listed get worse as signal rise times decrease. With current IC geometries shrinking, decreas- ing signal rise time is assured. Unfortunate- ly, the amount of time available to solve these problems is also shrinking. The successful com- pany will be the one that masters signal integ- rity problems, HDI, price reductions, and the shorter time-to-market. PCB References 1. Happy Holden, "Micro-Via Printed Wir- ing Boards: The Challenges of the Next Gener- ation of Substrates and Packages," Future Cir- cuits International, vol. 1. (1997). 2. Eric Bogatin. "Signal Integrity and HDI Substrates," The Board Authority, vol. 1 (2). (June 1999) pp. 22−26. 3. Eric Bogatin. "Signal Integrity" The Board Authority, vol. 2 (1). (December 2000) pp. 2−7. 4. Paul Franzon, "Electrical Modeling, Simu- lation and Design of Interconnects," vol. 1-De- sign, A short course by North Carolina State University. (November 8–11, 1998). 5. Richard Charbonneau, "A Comparison of Through Hole and Microvias in Printed Circuit Design," The Board Authority, vol. 1 (2). (June 1999) pp. 88−94. 6. Rod Strange and Greg Doyle, "Getting a Grip on Crosstalk," PC Design. (November 1998) pp. 32−35. 7. Steve Bird, "Designing Out Emissions," Proceeding of IPCWorks '97. (Arlington, VA: October 5, 1997) 8. Steve Bird, Gary Brist, and John Stew- art. "Advantages of Microvia Formation Using DYCOstrate Technology," SMI. (September 1996) 9. Holden, Happy, "HDI's Influence on Signal Integrity," EE Times, 2001. Happy Holden has worked in printed circuit technology since 1970 with Hewlett-Packard, NanYa/Westwood, Merix, Foxconn and Gentex. He is cur- rently a contributing editor with I-Connect007. To read past columns or to contact Holden, click here. HDI'S BENEFICIAL INFLUENCE ON HIGH-FREQUENCY SIGNAL INTEGRITY